#define CR 0x00
#define DATAPORT 0x10
#define IFGS1 0x12
#define IFGS2 0x13
#define MII_EEP 0x14
#define TR 0x15
#define IFG 0x16
#define GPI 0x17
#define GPOC 0x17
#define SPP1 0x18
#define SPP2 0x19
#define SPP3 0x1a
#define RESET 0x1f
#define PG0_PSTART 0x01
#define PG0_PSTOP 0x02
#define PG0_BNRY 0x03
#define PG0_TSR 0x04
#define PG0_TPSR 0x04
#define PG0_NCR 0x05
#define PG0_TBCR0 0x05
#define PG0_CPR 0x06
#define PG0_TBCR1 0x06
#define PG0_ISR 0x07
#define PG0_CRDA0 0x08
#define PG0_RSAR0 0x08
#define PG0_CRDA1 0x09
#define PG0_RSAR1 0x09
#define PG0_RBCR0 0x0a
#define PG0_RBCR1 0x0b
#define PG0_RSR 0x0c
#define PG0_RCR 0x0c
#define PG0_CNTR0 0x0d
#define PG0_TCR 0x0d
#define PG0_DCR 0x0e
#define PG0_IMR 0x0f
#define PG1_PAR0 0x01
#define PG1_PAR1 0x02
#define PG1_PAR2 0x03
#define PG1_PAR3 0x04
#define PG1_PAR4 0x05
#define PG1_PAR5 0x06
#define PG1_CPR 0x07
#define PG1_MAR0 0x08
#define PG1_MAR1 0x09
#define PG1_MAR2 0x0a
#define PG1_MAR3 0x0b
#define PG1_MAR4 0x0c
#define PG1_MAR5 0x0d
#define PG1_MAR6 0x0e
#define PG1_MAR7 0x0f
#define CR_STOP 0x01
#define CR_START 0x02
#define CR_TXP 0x04
#define CR_RD0 0x08
#define CR_RD1 0x10
#define CR_RD2 0x20
#define CR_PS0 0x40
#define CR_PS1 0x80
#define ISR_PRX 0x01
#define ISR_PTX 0x02
#define ISR_RXE 0x04
#define ISR_TXE 0x08
#define ISR_OVW 0x10
#define ISR_CNT 0x20
#define ISR_RDC 0x40
#define ISR_RST 0x80
#define IMR_PRXE 0x01
#define IMR_PTXE 0x02
#define IMR_RXEE 0x04
#define IMR_TXEE 0x08
#define IMR_OVWE 0x10
#define IMR_CNTE 0x20
#define IMR_RCDE 0x40
#define DCR_WTS 0x01
#define DCR_RDCR 0x80
#define TCR_CRC 0x01
#define TCR_LB0 0x02
#define TCR_LB1 0x04
#define TCR_RLO 0x20
#define TCR_PD 0x40
#define TCR_FDU 0x80
#define TSR_PTX 0x01
#define TSR_COL 0x04
#define TSR_ABT 0x08
#define TSR_OWC 0x80
#define RCR_SEP 0x01
#define RCR_AR 0x02
#define RCR_AB 0x04
#define RCR_AM 0x08
#define RCR_PRO 0x10
#define RCR_MON 0x20
#define RCR_INTT 0x40
#define RSR_PRX 0x01
#define RSR_CR 0x02
#define RSR_FAE 0x04
#define RSR_FO 0x08
#define RSR_MPA 0x10
#define RSR_PHY 0x20
#define RSR_DIS 0x40
#define MII_EEP_MDC 0x01
#define MII_EEP_MDIR 0x02
#define MII_EEP_MDI 0x04
#define MII_EEP_MDO 0x08
#define MII_EEP_EECS 0x10
#define MII_EEP_EEI 0x20
#define MII_EEP_EEO 0x40
#define MII_EEP_EECLK 0x80
#define TR_RST_B 0x02
#define PHY_MR0 0x00
#define PHY_MR1 0x01
#define PHY_MR2 0x02
#define PHY_MR3 0x03
#define PHY_MR4 0x04
#define PHY_MR5 0x05
#define PHY_MR6 0x06
#define PHY_MR7 0x07
#define PHY_MR16 0x10
#define PHY_MR17 0x11
#define PHY_MR18 0x12
#define PHY_MR19 0x13
#define PHY_MR20 0x14
#define PHY_MR21 0x15
#define PHY_MR22 0x16
#define PHY_MR23 0x17
#define PHY_MR24 0x18
#define PHY_MR25 0x19
#define PHY_MR26 0x1a
#define PHY_MR27 0x1b
#define PHY_MR28 0x1c
#define PHY_MR29 0x1d
#define PHY_MR30 0x1e
#define PHY_MR31 0x1f
#define MR0_SW_RESET 0x8000
#define MR0_LOOPBACK 0x4000
#define MR0_SPEED100 0x2000
#define MR0_NWAY_ENA 0x1000
#define MR0_PWRDN 0x0800
#define MR0_ISOLATE 0x0400
#define MR0_REDONWAY 0x0200
#define MR0_FULL_DUP 0x0100
#define MR0_COLTST 0x0080
#define MR1_T4ABLE 0x8000
#define MR1_TXFULDUP 0x4000
#define MR1_TXHAFDUP 0x2000
#define MR1_ENFULDUP 0x1000
#define MR1_ENHAFDUP 0x0800
#define MR1_NO_PA_OK 0x0040
#define MR1_NWAYDONE 0x0020
#define MR1_REM_FLT 0x0010
#define MR1_NWAYABLE 0x0008
#define MR1_LSTAT_OK 0x0004
#define MR1_JABBER 0x0002
#define MR1_EXT_ABLE 0x0001
#define MR31_LSTAT_OK 0x0800
#define MR31_SPEED100 0x0200
#define MR31_FULL_DUP 0x0100