File nut/include/arch/arm/at91sam7s.h


Included Files


Preprocessor definitions

#define _ARCH_ARM_SAM7S_H_

#define FLASH_BASE 0x100000UL

#define RAM_BASE 0x200000UL

#define TC_BASE 0xFFFA0000

#define UDP_BASE 0xFFFB0000

#define TWI_BASE 0xFFFB8000

#define USART0_BASE 0xFFFC0000

#define USART1_BASE 0xFFFC4000

#define PWMC_BASE 0xFFFCC000

#define SSC_BASE 0xFFFD4000

#define ADC_BASE 0xFFFD8000

#define SPI0_BASE 0xFFFE0000

#define AIC_BASE 0xFFFFF000

#define DBGU_BASE 0xFFFFF200

#define PIOA_BASE 0xFFFFF400

#define PMC_BASE 0xFFFFFC00

#define RSTC_BASE 0xFFFFFD00

#define RTT_BASE 0xFFFFFD20

#define PIT_BASE 0xFFFFFD30

#define WDT_BASE 0xFFFFFD40

#define VREG_BASE 0xFFFFFD60

#define MC_BASE 0xFFFFFF00

#define PERIPH_RPR_OFF 0x00000100

#define PERIPH_RCR_OFF 0x00000104

#define PERIPH_TPR_OFF 0x00000108

#define PERIPH_TCR_OFF 0x0000010C

#define PERIPH_RNPR_OFF 0x00000110

#define PERIPH_RNCR_OFF 0x00000114

#define PERIPH_TNPR_OFF 0x00000118

#define PERIPH_TNCR_OFF 0x0000011C

#define PERIPH_PTCR_OFF 0x00000120

#define PERIPH_PTSR_OFF 0x00000124

#define PDC_RXTEN 0x00000001

#define PDC_RXTDIS 0x00000002

#define PDC_TXTEN 0x00000100

#define PDC_TXTDIS 0x00000200

#define DBGU_HAS_PDC

#define SPI_HAS_PDC

#define SSC_HAS_PDC

#define USART_HAS_PDC

#define USART_HAS_MODE

#define PIO_HAS_MULTIDRIVER

#define PIO_HAS_PULLUP

#define PIO_HAS_PERIPHERALSELECT

#define PIO_HAS_OUTPUTWRITEENABLE

#define FIQ_ID 0

#define SYSC_ID 1

#define PIOA_ID 2

#define ADC_ID 4

#define SPI0_ID 5

#define US0_ID 6

#define US1_ID 7

#define SSC_ID 8

#define TWI_ID 9

#define PWMC_ID 10

#define UDP_ID 11

#define TC0_ID 12

#define TC1_ID 13

#define TC2_ID 14

#define IRQ0_ID 30

#define IRQ1_ID 31

#define SPI0_NPCS0_PA11A 11

#define SPI0_NPCS1_PA09B 9

#define SPI0_NPCS1_PA31A 31

#define SPI0_NPCS2_PA10B 10

#define SPI0_NPCS2_PA30B 30

#define SPI0_NPCS3_PA03B 3

#define SPI0_NPCS3_PA05B 5

#define SPI0_NPCS3_PA22B 22

#define SPI0_MISO_PA12A 12

#define SPI0_MOSI_PA13A 13

#define SPI0_SPCK_PA14A 14

#define PA5_RXD0_A 5

#define PA6_TXD0_A 6

#define PA2_SCK0_B 2

#define PA7_RTS0_A 7

#define PA8_CTS0_A 8

#define PA21_RXD1_A 21

#define PA22_TXD1_A 22

#define PA23_SCK1_A 23

#define PA24_RTS1_A 24

#define PA25_CTS1_A 25

#define PB26_DCD1_A 26

#define PB28_DSR1_A 28

#define PB27_DTR1_A 27

#define PB29_RI1_A 29

#define PA12_SPI0_MISO_A 12

#define PA13_SPI0_MOSI_A 13

#define PA14_SPI0_SPCK_A 14

#define PA11_SPI0_NPCS0_A 11

#define PA9_SPI0_NPCS1_B 9

#define PA31_SPI0_NPCS1_A 31

#define PA10_SPI0_NPCS2_B 10

#define PB30_SPI0_NPCS2_B 30

#define PA3_SPI0_NPCS3_B 3

#define PA5_SPI0_NPCS3_B 5

#define PA22_SPI0_NPCS3_B 22

#define SPI0_PINS

#define SPI0_PIO_BASE PIOA_BASE

#define SPI0_PSR_OFF PIO_ASR_OFF

#define SPI0_CS0_PIN

#define SPI0_CS0_PIO_BASE PIOA_BASE

#define SPI0_CS0_PSR_OFF PIO_ASR_OFF

#define SPI0_CS1_PIN

#define SPI0_CS1_PIO_BASE PIOA_BASE

#define SPI0_CS1_PSR_OFF PIO_ASR_OFF

#define SPI0_CS2_PIN

#define SPI0_CS2_PIO_BASE PIOA_BASE

#define SPI0_CS2_PSR_OFF PIO_ASR_OFF

#define SPI0_CS3_PIN

#define SPI0_CS3_PIO_BASE PIOA_BASE

#define SPI0_CS3_PSR_OFF PIO_ASR_OFF

#define PA9_DRXD_A 9

#define PA10_DTXD_A 10

#define PA17_TD_A 17

#define PA18_RD_A 18

#define PA16_TK_A 16

#define PA19_RK_A 19

#define PA15_TF_A 15

#define PA20_RF_A 20

#define PA3_TWD_A 3

#define PA4_TWCK_A 4

#define PA0_TIOA0_B 0

#define PA1_TIOB0_B 1

#define PA4_TCLK0_B 4

#define PA15_TIOA1_B 15

#define PA16_TIOB1_B 16

#define PA28_TCLK1_B 28

#define PA26_TIOA2_B 26

#define PA27_TIOB2_B 27

#define PA29_TCLK2_B 29

#define PA6_PCK0_B 6

#define PA17_PCK1_B 17

#define PA21_PCK1_B 21

#define PA18_PCK2_B 18

#define PA31_PCK2_B 31

#define PA19_FIQ_B 19

#define PA20_IRQ0_B 20

#define PA30_IRQ1_A 30

#define PA8_ADTRG_B 8

#define PA0_PWM0_A 0

#define PA23_PWM0_B 23

#define PA1_PWM1_A 1

#define PA24_PWM1_B 24

#define PA2_PWM2_A 2

#define PA13_PWM2_B 13

#define PA25_PWM2_B 25

#define PA7_PWM3_B 7

#define PA14_PWM3_B 14