File nut/include/arch/arm/at91sam7x.h


Included Files


Preprocessor definitions

#define _ARCH_ARM_SAM7X_H_

#define FLASH_BASE 0x100000UL

#define RAM_BASE 0x200000UL

#define TC_BASE 0xFFFA0000

#define UDP_BASE 0xFFFB0000

#define TWI_BASE 0xFFFB8000

#define USART0_BASE 0xFFFC0000

#define USART1_BASE 0xFFFC4000

#define PWMC_BASE 0xFFFCC000

#define CAN_BASE 0xFFFD0000

#define SSC_BASE 0xFFFD4000

#define ADC_BASE 0xFFFD8000

#define EMAC_BASE 0xFFFDC000

#define SPI0_BASE 0xFFFE0000

#define SPI1_BASE 0xFFFE4000

#define AIC_BASE 0xFFFFF000

#define DBGU_BASE 0xFFFFF200

#define PIOA_BASE 0xFFFFF400

#define PIOB_BASE 0xFFFFF600

#define PMC_BASE 0xFFFFFC00

#define RSTC_BASE 0xFFFFFD00

#define RTT_BASE 0xFFFFFD20

#define PIT_BASE 0xFFFFFD30

#define WDT_BASE 0xFFFFFD40

#define VREG_BASE 0xFFFFFD60

#define MC_BASE 0xFFFFFF00

#define PERIPH_RPR_OFF 0x00000100

#define PERIPH_RCR_OFF 0x00000104

#define PERIPH_TPR_OFF 0x00000108

#define PERIPH_TCR_OFF 0x0000010C

#define PERIPH_RNPR_OFF 0x00000110

#define PERIPH_RNCR_OFF 0x00000114

#define PERIPH_TNPR_OFF 0x00000118

#define PERIPH_TNCR_OFF 0x0000011C

#define PERIPH_PTCR_OFF 0x00000120

#define PERIPH_PTSR_OFF 0x00000124

#define PDC_RXTEN 0x00000001

#define PDC_RXTDIS 0x00000002

#define PDC_TXTEN 0x00000100

#define PDC_TXTDIS 0x00000200

#define DBGU_HAS_PDC

#define SPI_HAS_PDC

#define SSC_HAS_PDC

#define USART_HAS_PDC

#define USART_HAS_MODE

#define PIO_HAS_MULTIDRIVER

#define PIO_HAS_PULLUP

#define PIO_HAS_PERIPHERALSELECT

#define PIO_HAS_OUTPUTWRITEENABLE

#define FIQ_ID 0

#define SYSC_ID 1

#define PIOA_ID 2

#define PIOB_ID 3

#define SPI0_ID 4

#define SPI1_ID 5

#define US0_ID 6

#define US1_ID 7

#define SSC_ID 8

#define TWI_ID 9

#define PWMC_ID 10

#define UDP_ID 11

#define TC0_ID 12

#define TC1_ID 13

#define TC2_ID 14

#define CAN_ID 15

#define EMAC_ID 16

#define ADC_ID 17

#define IRQ0_ID 30

#define IRQ1_ID 31

#define SPI0_NPCS0_PA12A 12

#define SPI0_NPCS1_PA13A 13

#define SPI0_NPCS1_PA07B 7

#define SPI0_NPCS1_PB13B 13

#define SPI0_NPCS2_PA14A 14

#define SPI0_NPCS2_PA08B 8

#define SPI0_NPCS2_PB14B 14

#define SPI0_NPCS3_PA15A 15

#define SPI0_NPCS3_PA09B 9

#define SPI0_NPCS3_PB17B 17

#define SPI0_MISO_PA16A 16

#define SPI0_MOSI_PA17A 17

#define SPI0_SPCK_PA18A 18

#define PA0_RXD0_A 0

#define PA1_TXD0_A 1

#define PA2_SCK0_A 2

#define PA3_RTS0_A 3

#define PA4_CTS0_A 4

#define PA5_RXD1_A 5

#define PA6_TXD1_A 6

#define PA7_SCK1_A 7

#define PA8_RTS1_A 8

#define PA9_CTS1_A 9

#define PB23_DCD1_B 23

#define PB24_DSR1_B 24

#define PB25_DTR1_B 25

#define PB26_RI1_B 26

#define PA16_SPI0_MISO_A 16

#define PA17_SPI0_MOSI_A 17

#define PA18_SPI0_SPCK_A 18

#define PA12_SPI0_NPCS0_A 12

#define PA13_SPI0_NPCS1_A 13

#define PA7_SPI0_NPCS1_B 7

#define PA14_SPI0_NPCS2_A 14

#define PB14_SPI0_NPCS2_B 14

#define PA8_SPI0_NPCS2_B 8

#define PA15_SPI0_NPCS3_A 15

#define PA9_SPI0_NPCS3_B 9

#define SPI0_PINS

#define SPI0_PIO_BASE PIOA_BASE

#define SPI0_PSR_OFF PIO_ASR_OFF

#define SPI0_CS0_PIN

#define SPI0_CS0_PIO_BASE PIOA_BASE

#define SPI0_CS0_PSR_OFF PIO_ASR_OFF

#define SPI0_CS1_PIN

#define SPI0_CS1_PIO_BASE PIOA_BASE

#define SPI0_CS1_PSR_OFF PIO_ASR_OFF

#define SPI0_CS2_PIN

#define SPI0_CS2_PIO_BASE PIOA_BASE

#define SPI0_CS2_PSR_OFF PIO_ASR_OFF

#define SPI0_CS3_PIN

#define SPI0_CS3_PIO_BASE PIOA_BASE

#define SPI0_CS3_PSR_OFF PIO_ASR_OFF

#define PA24_SPI1_MISO_B 24

#define PA23_SPI1_MOSI_B 23

#define PA22_SPI1_SPCK_B 22

#define PA21_SPI1_NPCS0_B 21

#define PA25_SPI1_NPCS1_B 25

#define PB13_SPI0_NPCS1_B 13

#define PA2_SPI1_NPCS1_B 2

#define PB10_SPI1_NPCS1_B 10

#define PA26_SPI1_NPCS2_B 26

#define PA3_SPI1_NPCS2_B 3

#define PB11_SPI1_NPCS2_B 11

#define PB17_SPI0_NPCS3_B 17

#define PA4_SPI1_NPCS3_B 4

#define PA29_SPI1_NPCS3_B 29

#define PB16_SPI1_NPCS3_B 16

#define SPI1_PINS

#define SPI1_PIO_BASE PIOA_BASE

#define SPI1_PSR_OFF PIO_BSR_OFF

#define SPI1_CS0_PIN

#define SPI1_CS0_PIO_BASE PIOA_BASE

#define SPI1_CS0_PSR_OFF PIO_BSR_OFF

#define SPI1_CS1_PIN

#define SPI1_CS1_PIO_BASE PIOA_BASE

#define SPI1_CS1_PSR_OFF PIO_BSR_OFF

#define SPI1_CS2_PIN

#define SPI1_CS2_PIO_BASE PIOA_BASE

#define SPI1_CS2_PSR_OFF PIO_BSR_OFF

#define SPI1_CS3_PIN

#define SPI1_CS3_PIO_BASE PIOA_BASE

#define SPI1_CS3_PSR_OFF PIO_BSR_OFF

#define PB0_ETXCK_EREFCK_A 0

#define PB1_ETXEN_A 1

#define PB2_ETX0_A 2

#define PB3_ETX1_A 3

#define PB4_ECRS_A 4

#define PB5_ERX0_A 5

#define PB6_ERX1_A 6

#define PB7_ERXER_A 7

#define PB8_EMDC_A 8

#define PB9_EMDIO_A 9

#define PB10_ETX2_A 10

#define PB11_ETX3_A 11

#define PB12_ETXER_A 12

#define PB13_ERX2_A 13

#define PB14_ERX3_A 14

#define PB15_ERXDV_ECRSDV_A 15

#define PB16_ECOL_A 16

#define PB17_ERXCK_A 17

#define PB18_EF100_A 18

#define PA27_DRXD_A 27

#define PA28_DTXD_A 28

#define PA23_TD_A 23

#define PA24_RD_A 24

#define PA22_TK_A 22

#define PA25_RK_A 25

#define PA21_TF_A 21

#define PA26_RF_A 26

#define PA10_TWD_A 10

#define PA11_TWCK_A 11

#define PB23_TIOA0_A 23

#define PB24_TIOB0_A 24

#define PB12_TCLK0_B 12

#define PB25_TIOA1_A 25

#define PB26_TIOB1_A 26

#define PB19_TCLK1_B 19

#define PB27_TIOA2_A 27

#define PB28_TIOB2_A 28

#define PA15_TCLK2_B 15

#define PB0_PCK0_B 0

#define PB20_PCK0_B 20

#define PA13_PCK1_B 13

#define PB29_PCK1_A 29

#define PB21_PCK1_B 21

#define PA30_PCK2_B 30

#define PB30_PCK2_A 30

#define PB22_PCK2_B 22

#define PA27_PCK3_B 27

#define PA29_FIQ_A 29

#define PA30_IRQ0_A 30

#define PA14_IRQ1_B 14

#define PB18_ADTRG_B 18

#define PA19_CANRX_A 19

#define PA20_CANTX_A 20

#define PB19_PWM0_A 19

#define PB27_PWM0_B 27

#define PB20_PWM1_A 20

#define PB28_PWM1_B 28

#define PB21_PWM2_A 21

#define PB29_PWM2_B 29

#define PB22_PWM3_A 22

#define PB30_PWM3_B 30