#define FLASH_BASE 0x100000UL
#define RAM_BASE 0x200000UL
#define TC_BASE 0xFFFA0000
#define UDP_BASE 0xFFFA4000
#define MCI_BASE 0xFFFA8000
#define TWI_BASE 0xFFFAC000
#define USART0_BASE 0xFFFB0000
#define USART1_BASE 0xFFFB4000
#define USART2_BASE 0xFFFB8000
#define SSC_BASE 0xFFFBC000
#define ISI_BASE 0xFFFC0000
#define EMAC_BASE 0xFFFC4000
#define SPI0_BASE 0xFFFC8000
#define SPI1_BASE 0xFFFCC000
#define USART3_BASE 0xFFFD0000
#define USART4_BASE 0xFFFD4000
#define TWI1_BASE 0xFFFD8000
#define TC345_BASE 0xFFFDC000
#define ADC_BASE 0xFFFE0000
#define ECC_BASE 0xFFFFE800
#define SDRAMC_BASE 0xFFFFEA00
#define SMC_BASE 0xFFFFEC00
#define MATRIX_BASE 0xFFFFEE00
#define CCFG_BASE 0xFFFFEF10
#define AIC_BASE 0xFFFFF000
#define DBGU_BASE 0xFFFFF200
#define PIOA_BASE 0xFFFFF400
#define PIOB_BASE 0xFFFFF600
#define PIOC_BASE 0xFFFFF800
#define EEFC_BASE 0xFFFFFA00
#define PMC_BASE 0xFFFFFC00
#define RSTC_BASE 0xFFFFFD00
#define RTT_BASE 0xFFFFFD20
#define PIT_BASE 0xFFFFFD30
#define WDT_BASE 0xFFFFFD40
#define GPBR_BASE 0xFFFFFD50
#define PERIPH_RPR_OFF 0x00000100
#define PERIPH_RCR_OFF 0x00000104
#define PERIPH_TPR_OFF 0x00000108
#define PERIPH_TCR_OFF 0x0000010C
#define PERIPH_RNPR_OFF 0x00000110
#define PERIPH_RNCR_OFF 0x00000114
#define PERIPH_TNPR_OFF 0x00000118
#define PERIPH_TNCR_OFF 0x0000011C
#define PERIPH_PTCR_OFF 0x00000120
#define PERIPH_PTSR_OFF 0x00000124
#define PDC_RXTEN 0x00000001
#define PDC_RXTDIS 0x00000002
#define PDC_TXTEN 0x00000100
#define PDC_TXTDIS 0x00000200
#define DBGU_HAS_PDC
#define SPI_HAS_PDC
#define SSC_HAS_PDC
#define USART_HAS_PDC
#define USART_HAS_MODE
#define MCI_HAS_PDC
#define PMC_HAS_PLLB
#define PMC_HAS_MDIV
#define PIO_HAS_MULTIDRIVER
#define PIO_HAS_PULLUP
#define PIO_HAS_PERIPHERALSELECT
#define PIO_HAS_OUTPUTWRITEENABLE
#define FIQ_ID 0
#define SYSC_ID 1
#define PIOA_ID 2
#define PIOB_ID 3
#define PIOC_ID 4
#define ADC_ID 5
#define US0_ID 6
#define US1_ID 7
#define US2_ID 8
#define MCI_ID 9
#define UDP_ID 10
#define TWI0_ID 11
#define SPI0_ID 12
#define SPI1_ID 13
#define SSC_ID 14
#define TC0_ID 17
#define TC1_ID 18
#define TC2_ID 19
#define UHP_ID 20
#define EMAC_ID 21
#define ISI_ID 22
#define US3_ID 23
#define US4_ID 24
#define TWI1_ID 25
#define TC3_ID 26
#define TC4_ID 27
#define TC5_ID 28
#define IRQ0_ID 29
#define IRQ1_ID 30
#define IRQ2_ID 31
#define PA31_SCK0_A 31
#define PB4_TXD0_A 4
#define PB5_RXD0_A 5
#define PB27_CTS0_A 27
#define PB26_RTS0_A 26
#define PB25_RI0_A 25
#define PB22_DSR0_A 22
#define PB23_DCD0_A 23
#define PB24_DTR0_A 24
#define PA29_SCK1_A 29
#define PB6_TXD1_A 6
#define PB7_RXD1_A 7
#define PB29_CTS1_A 29
#define PB28_RTS1_A 28
#define PA30_SCK2_A 30
#define PB8_TXD2_A 8
#define PB9_RXD2_A 9
#define PA5_CTS2_A 5
#define PA4_RTS2_A 4
#define PC0_SCK3_B 0
#define PB10_TXD3_A 10
#define PB11_RXD3_A 11
#define PC10_CTS3_B 10
#define PC8_RTS3_B 8
#define PA31_TXD4_B 31
#define PA30_RXD4_B 30
#define PA0_SPI0_MISO_A 0
#define PA1_SPI0_MOSI_A 1
#define PA2_SPI0_SPCK_A 2
#define PA3_SPI0_NPCS0_A 3
#define PC11_SPI0_NPCS1_B 11
#define PC16_SPI0_NPCS2_B 16
#define PC17_SPI0_NPCS3_B 17
#define SPI0_PINS
#define SPI0_PIO_BASE PIOA_BASE
#define SPI0_PSR_OFF PIO_ASR_OFF
#define SPI0_CS0_PIN
#define SPI0_CS0_PIO_BASE PIOA_BASE
#define SPI0_CS0_PSR_OFF PIO_ASR_OFF
#define SPI0_CS1_PIN
#define SPI0_CS1_PIO_BASE PIOC_BASE
#define SPI0_CS1_PSR_OFF PIO_BSR_OFF
#define PB0_SPI1_MISO_A 0
#define PB1_SPI1_MOSI_A 1
#define PB2_SPI1_SPCK_A 2
#define PB3_SPI1_NPCS0_A 3
#define PC5_SPI1_NPCS1_B 5
#define PC18_SPI1_NPCS1_B 18
#define PC4_SPI1_NPCS2_B 4
#define PC19_SPI1_NPCS2_B 19
#define PC3_SPI1_NPCS3_B 3
#define PC20_SPI1_NPCS3_B 20
#define SPI1_PINS
#define SPI1_PIO_BASE PIOB_BASE
#define SPI1_PSR_OFF PIO_ASR_OFF
#define SPI1_CS0_PIN
#define SPI1_CS0_PIO_BASE PIOB_BASE
#define SPI1_CS0_PSR_OFF PIO_ASR_OFF
#define SPI1_CS3_PIN
#define SPI1_CS3_PIO_BASE PIOC_BASE
#define SPI1_CS3_PSR_OFF PIO_BSR_OFF
#define PB20_ISI_D0_B 20
#define PB21_ISI_D1_B 21
#define PB22_ISI_D2_B 22
#define PB23_ISI_D3_B 23
#define PB24_ISI_D4_B 24
#define PB25_ISI_D5_B 25
#define PB26_ISI_D6_B 26
#define PB27_ISI_D7_B 27
#define PB10_ISI_D8_B 10
#define PB11_ISI_D9_B 11
#define PB12_ISI_D10_B 12
#define PB13_ISI_D11_B 13
#define PB28_ISI_PCK_B 28
#define PB29_ISI_VSYNC_B 29
#define PB30_ISI_HSYNC_B 30
#define PB31_ISI_MCK_B 31
#define PA8_MCCK_A 8
#define PA7_MCCDA_A 7
#define PA6_MCDA0_A 6
#define PA9_MCDA1_A 9
#define PA10_MCDA2_A 10
#define PA11_MCDA3_A 11
#define PA1_MCCDB_B 1
#define PA0_MCDB0_B 0
#define PA5_MCDB1_B 5
#define PA4_MCDB2_B 4
#define PA3_MCDB3_B 3
#define PA10_ETX2_B 10
#define PA11_ETX3_B 11
#define PA12_ETX0_A 12
#define PA13_ETX1_A 13
#define PA14_ERX0_A 14
#define PA15_ERX1_A 15
#define PA16_ETXEN_A 16
#define PA17_ERXDV_A 17
#define PA18_ERXER_A 18
#define PA19_ETXCK_A 19
#define PA20_EMDC_A 20
#define PA21_EMDIO_A 21
#define PA22_ETXER_B 22
#define PA23_ETX2_B 23
#define PA24_ETX3_B 24
#define PA25_ERX2_B 25
#define PA26_ERX3_B 26
#define PA27_ERXCK_B 27
#define PA28_ECRS_B 28
#define PA29_ECOL_B 29
#define PC21_EF100_B 21
#define PA22_ADTRG_A 22
#define PB14_DRXD_A 14
#define PB15_DTXD_A 15
#define PB18_TD0_A 18
#define PB19_RD0_A 19
#define PB16_TK0_A 16
#define PB20_RK0_A 20
#define PB17_TF0_A 17
#define PB21_RF0_A 21
#define PA23_TWD0_A 23
#define PA24_TWCK0_A 24
#define PB12_TWD1_A 12
#define PB13_RWCK1_A 13
#define PA25_TCLK0_A 25
#define PA26_TIOA0_A 26
#define PC9_TIOB0_B 9
#define PB6_TCLK1_B 6
#define PA27_TIOA1_A 27
#define PC7_TIOB1_A 7
#define PB7_TCLK2_B 7
#define PA28_TIOA2_A 28
#define PC6_TIOB2_A 6
#define PB16_TCLK3_B 16
#define PB0_TIOA3_B 0
#define PB1_TIOB3_B 1
#define PB17_TCLK4_B 17
#define PB2_TIOA4_B 2
#define PB18_TIOB4_B 18
#define PC22_TCLK5_B 22
#define PB3_TIOA5_B 3
#define PB19_TIOB5_B 19
#define PB30_PCK0_A 30
#define PC1_PCK0_B 1
#define PB31_PCK1_A 31
#define PC2_PCK1_B 2
#define PC10_A25_CFRNW_A 10
#define PC8_NCS4_CFCS0_A 8
#define PC9_NCS5_CFCS1_A 9
#define PC6_CFCE1_B 6
#define PC7_CFCE2_B 7
#define PC16_D16_A 16
#define PC17_D17_A 17
#define PC18_D18_A 18
#define PC19_D19_A 19
#define PC20_D20_A 20
#define PC21_D21_A 21
#define PC22_D22_A 22
#define PC23_D23_A 23
#define PC24_D24_A 24
#define PC25_D25_A 25
#define PC26_D26_A 26
#define PC27_D27_A 27
#define PC28_D28_A 28
#define PC29_D29_A 29
#define PC30_D30_A 30
#define PC31_D31_A 31
#define PC4_A23_A 4
#define PC5_A24_A 5
#define PC11_NCS2_A 11
#define PC14_NCS3_NANDCS_A 14
#define PC13_NCS6_B 13
#define PC12_NCS7_B 12
#define PC15_NWAIT_A 15
#define PC13_FIQ_A 13
#define PC12_IRQ0_A 12
#define PC15_IRQ1_B 15
#define PC14_IRQ2_B 14