#define X12RTC_SCA0 0x00
#define X12RTC_SCA1 0x08
#define X12RTC_SCA_ESC 0x80
#define X12RTC_MNA0 0x01
#define X12RTC_MNA1 0x09
#define X12RTC_MNA_EMN 0x80
#define X12RTC_HRA0 0x02
#define X12RTC_HRA1 0x0A
#define X12RTC_HRA_EHR 0x80
#define X12RTC_DTA0 0x03
#define X12RTC_DTA1 0x0B
#define X12RTC_DTA_EDT 0x80
#define X12RTC_MOA0 0x04
#define X12RTC_MOA1 0x0C
#define X12RTC_MOA_EMO 0x80
#define X12RTC_YRA0 0x05
#define X12RTC_YRA1 0x0D
#define X12RTC_DWA0 0x06
#define X12RTC_DWA1 0x0E
#define X12RTC_DWA_EDW 0x80
#define X12RTC_Y2K0 0x07
#define X12RTC_Y2K1 0x0F
#define X12RTC_BL 0x10
#define X12RTC_BL_WD 0x18
#define X12RTC_BL_WD_1750 0x00
#define X12RTC_BL_WD_750 0x08
#define X12RTC_BL_WD_250 0x10
#define X12RTC_BL_WD_OFF 0x18
#define X12RTC_BL_BP 0xE0
#define X12RTC_BL_BP_NONE 0x00
#define X12RTC_BL_BP_UQUAD 0x20
#define X12RTC_BL_BP_UHALF 0x40
#define X12RTC_BL_BP_FULL 0x60
#define X12RTC_BL_BP_FIRST1 0x80
#define X12RTC_BL_BP_FIRST2 0xA0
#define X12RTC_BL_BP_FIRST3 0xC0
#define X12RTC_BL_BP_FIRST8 0xE0
#define X12RTC_INT 0x11
#define X12RTC_INT_FO 0x14
#define X12RTC_INT_FO_IRQ 0x00
#define X12RTC_INT_FO_32KHZ 0x04
#define X12RTC_INT_FO_100HZ 0x10
#define X12RTC_INT_FO_1HZ 0x14
#define X12RTC_INT_AL0E 0x20
#define X12RTC_INT_AL1E 0x40
#define X12RTC_INT_IM 0x80
#define X12RTC_ATR 0x12
#define X12RTC_DTR 0x13
#define X12RTC_DTR_NONE 0x00
#define X12RTC_DTR_PLUS10 0x02
#define X12RTC_DTR_PLUS20 0x01
#define X12RTC_DTR_PLUS30 0x03
#define X12RTC_DTR_MINUS10 0x06
#define X12RTC_DTR_MINUS20 0x05
#define X12RTC_DTR_MINUS30 0x07
#define X12RTC_SC 0x30
#define X12RTC_MN 0x31
#define X12RTC_HR 0x32
#define X12RTC_HR_MIL 0x80
#define X12RTC_DT 0x33
#define X12RTC_MO 0x34
#define X12RTC_YR 0x35
#define X12RTC_DW 0x36
#define X128xRTC_SSEC 0x37
#define X122xRTC_Y2K 0x37
#define X12RTC_SR 0x3F
#define X12RTC_SR_RTCF 0x01
#define X12RTC_SR_WEL 0x02
#define X12RTC_SR_RWEL 0x04
#define X12RTC_SR_AL0 0x20
#define X12RTC_SR_AL1 0x40
#define X12RTC_SR_BAT 0x80
Defined in: | nut/dev/x12rtc.c |