File nut/boot/xloader7/at91sam7s.h

Preprocessor definitions

#define AT91SAM7S64_H

#define AT91C_AIC_PRIOR

#define AT91C_AIC_PRIOR_LOWEST

#define AT91C_AIC_PRIOR_HIGHEST

#define AT91C_AIC_SRCTYPE

#define AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL

#define AT91C_AIC_SRCTYPE_EXT_LOW_LEVEL

#define AT91C_AIC_SRCTYPE_INT_POSITIVE_EDGE

#define AT91C_AIC_SRCTYPE_EXT_NEGATIVE_EDGE

#define AT91C_AIC_SRCTYPE_HIGH_LEVEL

#define AT91C_AIC_SRCTYPE_POSITIVE_EDGE

#define AT91C_AIC_NFIQ

#define AT91C_AIC_NIRQ

#define AT91C_AIC_DCR_PROT

#define AT91C_AIC_DCR_GMSK

#define AT91C_PDC_RXTEN

#define AT91C_PDC_RXTDIS

#define AT91C_PDC_TXTEN

#define AT91C_PDC_TXTDIS

#define AT91C_US_RSTRX

#define AT91C_US_RSTTX

#define AT91C_US_RXEN

#define AT91C_US_RXDIS

#define AT91C_US_TXEN

#define AT91C_US_TXDIS

#define AT91C_US_RSTSTA

#define AT91C_US_PAR

#define AT91C_US_PAR_EVEN

#define AT91C_US_PAR_ODD

#define AT91C_US_PAR_SPACE

#define AT91C_US_PAR_MARK

#define AT91C_US_PAR_NONE

#define AT91C_US_PAR_MULTI_DROP

#define AT91C_US_CHMODE

#define AT91C_US_CHMODE_NORMAL

#define AT91C_US_CHMODE_AUTO

#define AT91C_US_CHMODE_LOCAL

#define AT91C_US_CHMODE_REMOTE

#define AT91C_US_RXRDY

#define AT91C_US_TXRDY

#define AT91C_US_ENDRX

#define AT91C_US_ENDTX

#define AT91C_US_OVRE

#define AT91C_US_FRAME

#define AT91C_US_PARE

#define AT91C_US_TXEMPTY

#define AT91C_US_TXBUFE

#define AT91C_US_RXBUFF

#define AT91C_US_COMM_TX

#define AT91C_US_COMM_RX

#define AT91C_US_FORCE_NTRST

#define AT91C_CKGR_MOSCEN

#define AT91C_CKGR_OSCBYPASS

#define AT91C_CKGR_OSCOUNT

#define AT91C_CKGR_MAINF

#define AT91C_CKGR_MAINRDY

#define AT91C_CKGR_DIV

#define AT91C_CKGR_DIV_0

#define AT91C_CKGR_DIV_BYPASS

#define AT91C_CKGR_PLLCOUNT

#define AT91C_CKGR_OUT

#define AT91C_CKGR_OUT_0

#define AT91C_CKGR_OUT_1

#define AT91C_CKGR_OUT_2

#define AT91C_CKGR_OUT_3

#define AT91C_CKGR_MUL

#define AT91C_CKGR_USBDIV

#define AT91C_CKGR_USBDIV_0

#define AT91C_CKGR_USBDIV_1

#define AT91C_CKGR_USBDIV_2

#define AT91C_PMC_PCK

#define AT91C_PMC_UDP

#define AT91C_PMC_PCK0

#define AT91C_PMC_PCK1

#define AT91C_PMC_PCK2

#define AT91C_PMC_CSS

#define AT91C_PMC_CSS_SLOW_CLK

#define AT91C_PMC_CSS_MAIN_CLK

#define AT91C_PMC_CSS_PLL_CLK

#define AT91C_PMC_PRES

#define AT91C_PMC_PRES_CLK

#define AT91C_PMC_PRES_CLK_2

#define AT91C_PMC_PRES_CLK_4

#define AT91C_PMC_PRES_CLK_8

#define AT91C_PMC_PRES_CLK_16

#define AT91C_PMC_PRES_CLK_32

#define AT91C_PMC_PRES_CLK_64

#define AT91C_PMC_MOSCS

#define AT91C_PMC_LOCK

#define AT91C_PMC_MCKRDY

#define AT91C_PMC_PCK0RDY

#define AT91C_PMC_PCK1RDY

#define AT91C_PMC_PCK2RDY

#define AT91C_RSTC_PROCRST

#define AT91C_RSTC_PERRST

#define AT91C_RSTC_EXTRST

#define AT91C_RSTC_KEY

#define AT91C_RSTC_URSTS

#define AT91C_RSTC_BODSTS

#define AT91C_RSTC_RSTTYP

#define AT91C_RSTC_RSTTYP_POWERUP

#define AT91C_RSTC_RSTTYP_WAKEUP

#define AT91C_RSTC_RSTTYP_WATCHDOG

#define AT91C_RSTC_RSTTYP_SOFTWARE

#define AT91C_RSTC_RSTTYP_USER

#define AT91C_RSTC_RSTTYP_BROWNOUT

#define AT91C_RSTC_NRSTL

#define AT91C_RSTC_SRCMP

#define AT91C_RSTC_URSTEN

#define AT91C_RSTC_URSTIEN

#define AT91C_RSTC_ERSTL

#define AT91C_RSTC_BODIEN

#define AT91C_RTTC_RTPRES

#define AT91C_RTTC_ALMIEN

#define AT91C_RTTC_RTTINCIEN

#define AT91C_RTTC_RTTRST

#define AT91C_RTTC_ALMV

#define AT91C_RTTC_CRTV

#define AT91C_RTTC_ALMS

#define AT91C_RTTC_RTTINC

#define AT91C_PITC_PIV

#define AT91C_PITC_PITEN

#define AT91C_PITC_PITIEN

#define AT91C_PITC_PITS

#define AT91C_PITC_CPIV

#define AT91C_PITC_PICNT

#define AT91C_WDTC_WDRSTT

#define AT91C_WDTC_KEY

#define AT91C_WDTC_WDV

#define AT91C_WDTC_WDFIEN

#define AT91C_WDTC_WDRSTEN

#define AT91C_WDTC_WDRPROC

#define AT91C_WDTC_WDDIS

#define AT91C_WDTC_WDD

#define AT91C_WDTC_WDDBGHLT

#define AT91C_WDTC_WDIDLEHLT

#define AT91C_WDTC_WDUNF

#define AT91C_WDTC_WDERR

#define AT91C_VREG_PSTDBY

#define AT91C_MC_RCB

#define AT91C_MC_UNDADD

#define AT91C_MC_MISADD

#define AT91C_MC_ABTSZ

#define AT91C_MC_ABTSZ_BYTE

#define AT91C_MC_ABTSZ_HWORD

#define AT91C_MC_ABTSZ_WORD

#define AT91C_MC_ABTTYP

#define AT91C_MC_ABTTYP_DATAR

#define AT91C_MC_ABTTYP_DATAW

#define AT91C_MC_ABTTYP_FETCH

#define AT91C_MC_MST0

#define AT91C_MC_MST1

#define AT91C_MC_SVMST0

#define AT91C_MC_SVMST1

#define AT91C_MC_FRDY

#define AT91C_MC_LOCKE

#define AT91C_MC_PROGE

#define AT91C_MC_NEBP

#define AT91C_MC_FWS

#define AT91C_MC_FWS_0FWS

#define AT91C_MC_FWS_1FWS

#define AT91C_MC_FWS_2FWS

#define AT91C_MC_FWS_3FWS

#define AT91C_MC_FMCN

#define AT91C_MC_FCMD

#define AT91C_MC_FCMD_START_PROG

#define AT91C_MC_FCMD_LOCK

#define AT91C_MC_FCMD_PROG_AND_LOCK

#define AT91C_MC_FCMD_UNLOCK

#define AT91C_MC_FCMD_ERASE_ALL

#define AT91C_MC_FCMD_SET_GP_NVM

#define AT91C_MC_FCMD_CLR_GP_NVM

#define AT91C_MC_FCMD_SET_SECURITY

#define AT91C_MC_PAGEN

#define AT91C_MC_KEY

#define AT91C_MC_SECURITY

#define AT91C_MC_GPNVM0

#define AT91C_MC_GPNVM1

#define AT91C_MC_GPNVM2

#define AT91C_MC_GPNVM3

#define AT91C_MC_GPNVM4

#define AT91C_MC_GPNVM5

#define AT91C_MC_GPNVM6

#define AT91C_MC_GPNVM7

#define AT91C_MC_LOCKS0

#define AT91C_MC_LOCKS1

#define AT91C_MC_LOCKS2

#define AT91C_MC_LOCKS3

#define AT91C_MC_LOCKS4

#define AT91C_MC_LOCKS5

#define AT91C_MC_LOCKS6

#define AT91C_MC_LOCKS7

#define AT91C_MC_LOCKS8

#define AT91C_MC_LOCKS9

#define AT91C_MC_LOCKS10

#define AT91C_MC_LOCKS11

#define AT91C_MC_LOCKS12

#define AT91C_MC_LOCKS13

#define AT91C_MC_LOCKS14

#define AT91C_MC_LOCKS15

#define AT91C_SPI_SPIEN

#define AT91C_SPI_SPIDIS

#define AT91C_SPI_SWRST

#define AT91C_SPI_LASTXFER

#define AT91C_SPI_MSTR

#define AT91C_SPI_PS

#define AT91C_SPI_PS_FIXED

#define AT91C_SPI_PS_VARIABLE

#define AT91C_SPI_PCSDEC

#define AT91C_SPI_FDIV

#define AT91C_SPI_MODFDIS

#define AT91C_SPI_LLB

#define AT91C_SPI_PCS

#define AT91C_SPI_DLYBCS

#define AT91C_SPI_RD

#define AT91C_SPI_RPCS

#define AT91C_SPI_TD

#define AT91C_SPI_TPCS

#define AT91C_SPI_RDRF

#define AT91C_SPI_TDRE

#define AT91C_SPI_MODF

#define AT91C_SPI_OVRES

#define AT91C_SPI_ENDRX

#define AT91C_SPI_ENDTX

#define AT91C_SPI_RXBUFF

#define AT91C_SPI_TXBUFE

#define AT91C_SPI_NSSR

#define AT91C_SPI_TXEMPTY

#define AT91C_SPI_SPIENS

#define AT91C_SPI_CPOL

#define AT91C_SPI_NCPHA

#define AT91C_SPI_CSAAT

#define AT91C_SPI_BITS

#define AT91C_SPI_BITS_8

#define AT91C_SPI_BITS_9

#define AT91C_SPI_BITS_10

#define AT91C_SPI_BITS_11

#define AT91C_SPI_BITS_12

#define AT91C_SPI_BITS_13

#define AT91C_SPI_BITS_14

#define AT91C_SPI_BITS_15

#define AT91C_SPI_BITS_16

#define AT91C_SPI_SCBR

#define AT91C_SPI_DLYBS

#define AT91C_SPI_DLYBCT

#define AT91C_ADC_SWRST

#define AT91C_ADC_START

#define AT91C_ADC_TRGEN

#define AT91C_ADC_TRGEN_DIS

#define AT91C_ADC_TRGEN_EN

#define AT91C_ADC_TRGSEL

#define AT91C_ADC_TRGSEL_TIOA0

#define AT91C_ADC_TRGSEL_TIOA1

#define AT91C_ADC_TRGSEL_TIOA2

#define AT91C_ADC_TRGSEL_TIOA3

#define AT91C_ADC_TRGSEL_TIOA4

#define AT91C_ADC_TRGSEL_TIOA5

#define AT91C_ADC_TRGSEL_EXT

#define AT91C_ADC_LOWRES

#define AT91C_ADC_LOWRES_10_BIT

#define AT91C_ADC_LOWRES_8_BIT

#define AT91C_ADC_SLEEP

#define AT91C_ADC_SLEEP_NORMAL_MODE

#define AT91C_ADC_SLEEP_MODE

#define AT91C_ADC_PRESCAL

#define AT91C_ADC_STARTUP

#define AT91C_ADC_SHTIM

#define AT91C_ADC_CH0

#define AT91C_ADC_CH1

#define AT91C_ADC_CH2

#define AT91C_ADC_CH3

#define AT91C_ADC_CH4

#define AT91C_ADC_CH5

#define AT91C_ADC_CH6

#define AT91C_ADC_CH7

#define AT91C_ADC_EOC0

#define AT91C_ADC_EOC1

#define AT91C_ADC_EOC2

#define AT91C_ADC_EOC3

#define AT91C_ADC_EOC4

#define AT91C_ADC_EOC5

#define AT91C_ADC_EOC6

#define AT91C_ADC_EOC7

#define AT91C_ADC_OVRE0

#define AT91C_ADC_OVRE1

#define AT91C_ADC_OVRE2

#define AT91C_ADC_OVRE3

#define AT91C_ADC_OVRE4

#define AT91C_ADC_OVRE5

#define AT91C_ADC_OVRE6

#define AT91C_ADC_OVRE7

#define AT91C_ADC_DRDY

#define AT91C_ADC_GOVRE

#define AT91C_ADC_ENDRX

#define AT91C_ADC_RXBUFF

#define AT91C_ADC_LDATA

#define AT91C_ADC_DATA

#define AT91C_SSC_RXEN

#define AT91C_SSC_RXDIS

#define AT91C_SSC_TXEN

#define AT91C_SSC_TXDIS

#define AT91C_SSC_SWRST

#define AT91C_SSC_CKS

#define AT91C_SSC_CKS_DIV

#define AT91C_SSC_CKS_TK

#define AT91C_SSC_CKS_RK

#define AT91C_SSC_CKO

#define AT91C_SSC_CKO_NONE

#define AT91C_SSC_CKO_CONTINOUS

#define AT91C_SSC_CKO_DATA_TX

#define AT91C_SSC_CKI

#define AT91C_SSC_START

#define AT91C_SSC_START_CONTINOUS

#define AT91C_SSC_START_TX

#define AT91C_SSC_START_LOW_RF

#define AT91C_SSC_START_HIGH_RF

#define AT91C_SSC_START_FALL_RF

#define AT91C_SSC_START_RISE_RF

#define AT91C_SSC_START_LEVEL_RF

#define AT91C_SSC_START_EDGE_RF

#define AT91C_SSC_START_0

#define AT91C_SSC_STTDLY

#define AT91C_SSC_PERIOD

#define AT91C_SSC_DATLEN

#define AT91C_SSC_LOOP

#define AT91C_SSC_MSBF

#define AT91C_SSC_DATNB

#define AT91C_SSC_FSLEN

#define AT91C_SSC_FSOS

#define AT91C_SSC_FSOS_NONE

#define AT91C_SSC_FSOS_NEGATIVE

#define AT91C_SSC_FSOS_POSITIVE

#define AT91C_SSC_FSOS_LOW

#define AT91C_SSC_FSOS_HIGH

#define AT91C_SSC_FSOS_TOGGLE

#define AT91C_SSC_FSEDGE

#define AT91C_SSC_DATDEF

#define AT91C_SSC_FSDEN

#define AT91C_SSC_TXRDY

#define AT91C_SSC_TXEMPTY

#define AT91C_SSC_ENDTX

#define AT91C_SSC_TXBUFE

#define AT91C_SSC_RXRDY

#define AT91C_SSC_OVRUN

#define AT91C_SSC_ENDRX

#define AT91C_SSC_RXBUFF

#define AT91C_SSC_TXSYN

#define AT91C_SSC_RXSYN

#define AT91C_SSC_TXENA

#define AT91C_SSC_RXENA

#define AT91C_US_STTBRK

#define AT91C_US_STPBRK

#define AT91C_US_STTTO

#define AT91C_US_SENDA

#define AT91C_US_RSTIT

#define AT91C_US_RSTNACK

#define AT91C_US_RETTO

#define AT91C_US_DTREN

#define AT91C_US_DTRDIS

#define AT91C_US_RTSEN

#define AT91C_US_RTSDIS

#define AT91C_US_USMODE

#define AT91C_US_USMODE_NORMAL

#define AT91C_US_USMODE_RS485

#define AT91C_US_USMODE_HWHSH

#define AT91C_US_USMODE_MODEM

#define AT91C_US_USMODE_ISO7816_0

#define AT91C_US_USMODE_ISO7816_1

#define AT91C_US_USMODE_IRDA

#define AT91C_US_USMODE_SWHSH

#define AT91C_US_CLKS

#define AT91C_US_CLKS_CLOCK

#define AT91C_US_CLKS_FDIV1

#define AT91C_US_CLKS_SLOW

#define AT91C_US_CLKS_EXT

#define AT91C_US_CHRL

#define AT91C_US_CHRL_5_BITS

#define AT91C_US_CHRL_6_BITS

#define AT91C_US_CHRL_7_BITS

#define AT91C_US_CHRL_8_BITS

#define AT91C_US_SYNC

#define AT91C_US_NBSTOP

#define AT91C_US_NBSTOP_1_BIT

#define AT91C_US_NBSTOP_15_BIT

#define AT91C_US_NBSTOP_2_BIT

#define AT91C_US_MSBF

#define AT91C_US_MODE9

#define AT91C_US_CKLO

#define AT91C_US_OVER

#define AT91C_US_INACK

#define AT91C_US_DSNACK

#define AT91C_US_MAX_ITER

#define AT91C_US_FILTER

#define AT91C_US_RXBRK

#define AT91C_US_TIMEOUT

#define AT91C_US_ITERATION

#define AT91C_US_NACK

#define AT91C_US_RIIC

#define AT91C_US_DSRIC

#define AT91C_US_DCDIC

#define AT91C_US_CTSIC

#define AT91C_US_RI

#define AT91C_US_DSR

#define AT91C_US_DCD

#define AT91C_US_CTS

#define AT91C_TWI_START

#define AT91C_TWI_STOP

#define AT91C_TWI_MSEN

#define AT91C_TWI_MSDIS

#define AT91C_TWI_SWRST

#define AT91C_TWI_IADRSZ

#define AT91C_TWI_IADRSZ_NO

#define AT91C_TWI_IADRSZ_1_BYTE

#define AT91C_TWI_IADRSZ_2_BYTE

#define AT91C_TWI_IADRSZ_3_BYTE

#define AT91C_TWI_MREAD

#define AT91C_TWI_DADR

#define AT91C_TWI_CLDIV

#define AT91C_TWI_CHDIV

#define AT91C_TWI_CKDIV

#define AT91C_TWI_TXCOMP

#define AT91C_TWI_RXRDY

#define AT91C_TWI_TXRDY

#define AT91C_TWI_OVRE

#define AT91C_TWI_UNRE

#define AT91C_TWI_NACK

#define AT91C_TC_CLKEN

#define AT91C_TC_CLKDIS

#define AT91C_TC_SWTRG

#define AT91C_TC_CLKS

#define AT91C_TC_CLKS_TIMER_DIV1_CLOCK

#define AT91C_TC_CLKS_TIMER_DIV2_CLOCK

#define AT91C_TC_CLKS_TIMER_DIV3_CLOCK

#define AT91C_TC_CLKS_TIMER_DIV4_CLOCK

#define AT91C_TC_CLKS_TIMER_DIV5_CLOCK

#define AT91C_TC_CLKS_XC0

#define AT91C_TC_CLKS_XC1

#define AT91C_TC_CLKS_XC2

#define AT91C_TC_CLKI

#define AT91C_TC_BURST

#define AT91C_TC_BURST_NONE

#define AT91C_TC_BURST_XC0

#define AT91C_TC_BURST_XC1

#define AT91C_TC_BURST_XC2

#define AT91C_TC_CPCSTOP

#define AT91C_TC_LDBSTOP

#define AT91C_TC_CPCDIS

#define AT91C_TC_LDBDIS

#define AT91C_TC_ETRGEDG

#define AT91C_TC_ETRGEDG_NONE

#define AT91C_TC_ETRGEDG_RISING

#define AT91C_TC_ETRGEDG_FALLING

#define AT91C_TC_ETRGEDG_BOTH

#define AT91C_TC_EEVTEDG

#define AT91C_TC_EEVTEDG_NONE

#define AT91C_TC_EEVTEDG_RISING

#define AT91C_TC_EEVTEDG_FALLING

#define AT91C_TC_EEVTEDG_BOTH

#define AT91C_TC_EEVT

#define AT91C_TC_EEVT_TIOB

#define AT91C_TC_EEVT_XC0

#define AT91C_TC_EEVT_XC1

#define AT91C_TC_EEVT_XC2

#define AT91C_TC_ABETRG

#define AT91C_TC_ENETRG

#define AT91C_TC_WAVESEL

#define AT91C_TC_WAVESEL_UP

#define AT91C_TC_WAVESEL_UPDOWN

#define AT91C_TC_WAVESEL_UP_AUTO

#define AT91C_TC_WAVESEL_UPDOWN_AUTO

#define AT91C_TC_CPCTRG

#define AT91C_TC_WAVE

#define AT91C_TC_ACPA

#define AT91C_TC_ACPA_NONE

#define AT91C_TC_ACPA_SET

#define AT91C_TC_ACPA_CLEAR

#define AT91C_TC_ACPA_TOGGLE

#define AT91C_TC_LDRA

#define AT91C_TC_LDRA_NONE

#define AT91C_TC_LDRA_RISING

#define AT91C_TC_LDRA_FALLING

#define AT91C_TC_LDRA_BOTH

#define AT91C_TC_ACPC

#define AT91C_TC_ACPC_NONE

#define AT91C_TC_ACPC_SET

#define AT91C_TC_ACPC_CLEAR

#define AT91C_TC_ACPC_TOGGLE

#define AT91C_TC_LDRB

#define AT91C_TC_LDRB_NONE

#define AT91C_TC_LDRB_RISING

#define AT91C_TC_LDRB_FALLING

#define AT91C_TC_LDRB_BOTH

#define AT91C_TC_AEEVT

#define AT91C_TC_AEEVT_NONE

#define AT91C_TC_AEEVT_SET

#define AT91C_TC_AEEVT_CLEAR

#define AT91C_TC_AEEVT_TOGGLE

#define AT91C_TC_ASWTRG

#define AT91C_TC_ASWTRG_NONE

#define AT91C_TC_ASWTRG_SET

#define AT91C_TC_ASWTRG_CLEAR

#define AT91C_TC_ASWTRG_TOGGLE

#define AT91C_TC_BCPB

#define AT91C_TC_BCPB_NONE

#define AT91C_TC_BCPB_SET

#define AT91C_TC_BCPB_CLEAR

#define AT91C_TC_BCPB_TOGGLE

#define AT91C_TC_BCPC

#define AT91C_TC_BCPC_NONE

#define AT91C_TC_BCPC_SET

#define AT91C_TC_BCPC_CLEAR

#define AT91C_TC_BCPC_TOGGLE

#define AT91C_TC_BEEVT

#define AT91C_TC_BEEVT_NONE

#define AT91C_TC_BEEVT_SET

#define AT91C_TC_BEEVT_CLEAR

#define AT91C_TC_BEEVT_TOGGLE

#define AT91C_TC_BSWTRG

#define AT91C_TC_BSWTRG_NONE

#define AT91C_TC_BSWTRG_SET

#define AT91C_TC_BSWTRG_CLEAR

#define AT91C_TC_BSWTRG_TOGGLE

#define AT91C_TC_COVFS

#define AT91C_TC_LOVRS

#define AT91C_TC_CPAS

#define AT91C_TC_CPBS

#define AT91C_TC_CPCS

#define AT91C_TC_LDRAS

#define AT91C_TC_LDRBS

#define AT91C_TC_ETRGS

#define AT91C_TC_CLKSTA

#define AT91C_TC_MTIOA

#define AT91C_TC_MTIOB

#define AT91C_TCB_SYNC

#define AT91C_TCB_TC0XC0S

#define AT91C_TCB_TC0XC0S_TCLK0

#define AT91C_TCB_TC0XC0S_NONE

#define AT91C_TCB_TC0XC0S_TIOA1

#define AT91C_TCB_TC0XC0S_TIOA2

#define AT91C_TCB_TC1XC1S

#define AT91C_TCB_TC1XC1S_TCLK1

#define AT91C_TCB_TC1XC1S_NONE

#define AT91C_TCB_TC1XC1S_TIOA0

#define AT91C_TCB_TC1XC1S_TIOA2

#define AT91C_TCB_TC2XC2S

#define AT91C_TCB_TC2XC2S_TCLK2

#define AT91C_TCB_TC2XC2S_NONE

#define AT91C_TCB_TC2XC2S_TIOA0

#define AT91C_TCB_TC2XC2S_TIOA1

#define AT91C_PWMC_CPRE

#define AT91C_PWMC_CPRE_MCK

#define AT91C_PWMC_CPRE_MCKA

#define AT91C_PWMC_CPRE_MCKB

#define AT91C_PWMC_CALG

#define AT91C_PWMC_CPOL

#define AT91C_PWMC_CPD

#define AT91C_PWMC_CDTY

#define AT91C_PWMC_CPRD

#define AT91C_PWMC_CCNT

#define AT91C_PWMC_CUPD

#define AT91C_PWMC_DIVA

#define AT91C_PWMC_PREA

#define AT91C_PWMC_PREA_MCK

#define AT91C_PWMC_DIVB

#define AT91C_PWMC_PREB

#define AT91C_PWMC_PREB_MCK

#define AT91C_PWMC_CHID0

#define AT91C_PWMC_CHID1

#define AT91C_PWMC_CHID2

#define AT91C_PWMC_CHID3

#define AT91C_UDP_FRM_NUM

#define AT91C_UDP_FRM_ERR

#define AT91C_UDP_FRM_OK

#define AT91C_UDP_FADDEN

#define AT91C_UDP_CONFG

#define AT91C_UDP_ESR

#define AT91C_UDP_RSMINPR

#define AT91C_UDP_RMWUPE

#define AT91C_UDP_FADD

#define AT91C_UDP_FEN

#define AT91C_UDP_EPINT0

#define AT91C_UDP_EPINT1

#define AT91C_UDP_EPINT2

#define AT91C_UDP_EPINT3

#define AT91C_UDP_RXSUSP

#define AT91C_UDP_RXRSM

#define AT91C_UDP_EXTRSM

#define AT91C_UDP_SOFINT

#define AT91C_UDP_WAKEUP

#define AT91C_UDP_ENDBUSRES

#define AT91C_UDP_EP0

#define AT91C_UDP_EP1

#define AT91C_UDP_EP2

#define AT91C_UDP_EP3

#define AT91C_UDP_TXCOMP

#define AT91C_UDP_RX_DATA_BK0

#define AT91C_UDP_RXSETUP

#define AT91C_UDP_ISOERROR

#define AT91C_UDP_TXPKTRDY

#define AT91C_UDP_FORCESTALL

#define AT91C_UDP_RX_DATA_BK1

#define AT91C_UDP_DIR

#define AT91C_UDP_EPTYPE

#define AT91C_UDP_EPTYPE_CTRL

#define AT91C_UDP_EPTYPE_ISO_OUT

#define AT91C_UDP_EPTYPE_BULK_OUT

#define AT91C_UDP_EPTYPE_INT_OUT

#define AT91C_UDP_EPTYPE_ISO_IN

#define AT91C_UDP_EPTYPE_BULK_IN

#define AT91C_UDP_EPTYPE_INT_IN

#define AT91C_UDP_DTGLE

#define AT91C_UDP_EPEDS

#define AT91C_UDP_RXBYTECNT

#define AT91C_UDP_TXVDIS

#define AT91C_AIC_IVR

#define AT91C_AIC_SMR

#define AT91C_AIC_FVR

#define AT91C_AIC_DCR

#define AT91C_AIC_EOICR

#define AT91C_AIC_SVR

#define AT91C_AIC_FFSR

#define AT91C_AIC_ICCR

#define AT91C_AIC_ISR

#define AT91C_AIC_IMR

#define AT91C_AIC_IPR

#define AT91C_AIC_FFER

#define AT91C_AIC_IECR

#define AT91C_AIC_ISCR

#define AT91C_AIC_FFDR

#define AT91C_AIC_CISR

#define AT91C_AIC_IDCR

#define AT91C_AIC_SPU

#define AT91C_DBGU_TCR

#define AT91C_DBGU_RNPR

#define AT91C_DBGU_TNPR

#define AT91C_DBGU_TPR

#define AT91C_DBGU_RPR

#define AT91C_DBGU_RCR

#define AT91C_DBGU_RNCR

#define AT91C_DBGU_PTCR

#define AT91C_DBGU_PTSR

#define AT91C_DBGU_TNCR

#define AT91C_DBGU_EXID

#define AT91C_DBGU_BRGR

#define AT91C_DBGU_IDR

#define AT91C_DBGU_CSR

#define AT91C_DBGU_CIDR

#define AT91C_DBGU_MR

#define AT91C_DBGU_IMR

#define AT91C_DBGU_CR

#define AT91C_DBGU_FNTR

#define AT91C_DBGU_THR

#define AT91C_DBGU_RHR

#define AT91C_DBGU_IER

#define AT91C_PIOA_ODR

#define AT91C_PIOA_SODR

#define AT91C_PIOA_ISR

#define AT91C_PIOA_ABSR

#define AT91C_PIOA_IER

#define AT91C_PIOA_PPUDR

#define AT91C_PIOA_IMR

#define AT91C_PIOA_PER

#define AT91C_PIOA_IFDR

#define AT91C_PIOA_OWDR

#define AT91C_PIOA_MDSR

#define AT91C_PIOA_IDR

#define AT91C_PIOA_ODSR

#define AT91C_PIOA_PPUSR

#define AT91C_PIOA_OWSR

#define AT91C_PIOA_BSR

#define AT91C_PIOA_OWER

#define AT91C_PIOA_IFER

#define AT91C_PIOA_PDSR

#define AT91C_PIOA_PPUER

#define AT91C_PIOA_OSR

#define AT91C_PIOA_ASR

#define AT91C_PIOA_MDDR

#define AT91C_PIOA_CODR

#define AT91C_PIOA_MDER

#define AT91C_PIOA_PDR

#define AT91C_PIOA_IFSR

#define AT91C_PIOA_OER

#define AT91C_PIOA_PSR

#define AT91C_CKGR_MOR

#define AT91C_CKGR_PLLR

#define AT91C_CKGR_MCFR

#define AT91C_PMC_IDR

#define AT91C_PMC_MOR

#define AT91C_PMC_PLLR

#define AT91C_PMC_PCER

#define AT91C_PMC_PCKR

#define AT91C_PMC_MCKR

#define AT91C_PMC_SCDR

#define AT91C_PMC_PCDR

#define AT91C_PMC_SCSR

#define AT91C_PMC_PCSR

#define AT91C_PMC_MCFR

#define AT91C_PMC_SCER

#define AT91C_PMC_IMR

#define AT91C_PMC_IER

#define AT91C_PMC_SR

#define AT91C_RSTC_RCR

#define AT91C_RSTC_RMR

#define AT91C_RSTC_RSR

#define AT91C_RTTC_RTSR

#define AT91C_RTTC_RTMR

#define AT91C_RTTC_RTVR

#define AT91C_RTTC_RTAR

#define AT91C_PITC_PIVR

#define AT91C_PITC_PISR

#define AT91C_PITC_PIIR

#define AT91C_PITC_PIMR

#define AT91C_WDTC_WDCR

#define AT91C_WDTC_WDSR

#define AT91C_WDTC_WDMR

#define AT91C_VREG_MR

#define AT91C_MC_ASR

#define AT91C_MC_RCR

#define AT91C_MC_FCR

#define AT91C_MC_AASR

#define AT91C_MC_FSR

#define AT91C_MC_FMR

#define AT91C_SPI_PTCR

#define AT91C_SPI_TPR

#define AT91C_SPI_TCR

#define AT91C_SPI_RCR

#define AT91C_SPI_PTSR

#define AT91C_SPI_RNPR

#define AT91C_SPI_RPR

#define AT91C_SPI_TNCR

#define AT91C_SPI_RNCR

#define AT91C_SPI_TNPR

#define AT91C_SPI_IER

#define AT91C_SPI_SR

#define AT91C_SPI_IDR

#define AT91C_SPI_CR

#define AT91C_SPI_MR

#define AT91C_SPI_IMR

#define AT91C_SPI_TDR

#define AT91C_SPI_RDR

#define AT91C_SPI_CSR

#define AT91C_ADC_PTSR

#define AT91C_ADC_PTCR

#define AT91C_ADC_TNPR

#define AT91C_ADC_TNCR

#define AT91C_ADC_RNPR

#define AT91C_ADC_RNCR

#define AT91C_ADC_RPR

#define AT91C_ADC_TCR

#define AT91C_ADC_TPR

#define AT91C_ADC_RCR

#define AT91C_ADC_CDR2

#define AT91C_ADC_CDR3

#define AT91C_ADC_CDR0

#define AT91C_ADC_CDR5

#define AT91C_ADC_CHDR

#define AT91C_ADC_SR

#define AT91C_ADC_CDR4

#define AT91C_ADC_CDR1

#define AT91C_ADC_LCDR

#define AT91C_ADC_IDR

#define AT91C_ADC_CR

#define AT91C_ADC_CDR7

#define AT91C_ADC_CDR6

#define AT91C_ADC_IER

#define AT91C_ADC_CHER

#define AT91C_ADC_CHSR

#define AT91C_ADC_MR

#define AT91C_ADC_IMR

#define AT91C_SSC_TNCR

#define AT91C_SSC_RPR

#define AT91C_SSC_RNCR

#define AT91C_SSC_TPR

#define AT91C_SSC_PTCR

#define AT91C_SSC_TCR

#define AT91C_SSC_RCR

#define AT91C_SSC_RNPR

#define AT91C_SSC_TNPR

#define AT91C_SSC_PTSR

#define AT91C_SSC_RHR

#define AT91C_SSC_RSHR

#define AT91C_SSC_TFMR

#define AT91C_SSC_IDR

#define AT91C_SSC_THR

#define AT91C_SSC_RCMR

#define AT91C_SSC_IER

#define AT91C_SSC_TSHR

#define AT91C_SSC_SR

#define AT91C_SSC_CMR

#define AT91C_SSC_TCMR

#define AT91C_SSC_CR

#define AT91C_SSC_IMR

#define AT91C_SSC_RFMR

#define AT91C_US1_RNCR

#define AT91C_US1_PTCR

#define AT91C_US1_TCR

#define AT91C_US1_PTSR

#define AT91C_US1_TNPR

#define AT91C_US1_RCR

#define AT91C_US1_RNPR

#define AT91C_US1_RPR

#define AT91C_US1_TNCR

#define AT91C_US1_TPR

#define AT91C_US1_IF

#define AT91C_US1_NER

#define AT91C_US1_RTOR

#define AT91C_US1_CSR

#define AT91C_US1_IDR

#define AT91C_US1_IER

#define AT91C_US1_THR

#define AT91C_US1_TTGR

#define AT91C_US1_RHR

#define AT91C_US1_BRGR

#define AT91C_US1_IMR

#define AT91C_US1_FIDI

#define AT91C_US1_CR

#define AT91C_US1_MR

#define AT91C_US0_TNPR

#define AT91C_US0_RNPR

#define AT91C_US0_TCR

#define AT91C_US0_PTCR

#define AT91C_US0_PTSR

#define AT91C_US0_TNCR

#define AT91C_US0_TPR

#define AT91C_US0_RCR

#define AT91C_US0_RPR

#define AT91C_US0_RNCR

#define AT91C_US0_BRGR

#define AT91C_US0_NER

#define AT91C_US0_CR

#define AT91C_US0_IMR

#define AT91C_US0_FIDI

#define AT91C_US0_TTGR

#define AT91C_US0_MR

#define AT91C_US0_RTOR

#define AT91C_US0_CSR

#define AT91C_US0_RHR

#define AT91C_US0_IDR

#define AT91C_US0_THR

#define AT91C_US0_IF

#define AT91C_US0_IER

#define AT91C_TWI_IER

#define AT91C_TWI_CR

#define AT91C_TWI_SR

#define AT91C_TWI_IMR

#define AT91C_TWI_THR

#define AT91C_TWI_IDR

#define AT91C_TWI_IADR

#define AT91C_TWI_MMR

#define AT91C_TWI_CWGR

#define AT91C_TWI_RHR

#define AT91C_TC0_SR

#define AT91C_TC0_RC

#define AT91C_TC0_RB

#define AT91C_TC0_CCR

#define AT91C_TC0_CMR

#define AT91C_TC0_IER

#define AT91C_TC0_RA

#define AT91C_TC0_IDR

#define AT91C_TC0_CV

#define AT91C_TC0_IMR

#define AT91C_TC1_RB

#define AT91C_TC1_CCR

#define AT91C_TC1_IER

#define AT91C_TC1_IDR

#define AT91C_TC1_SR

#define AT91C_TC1_CMR

#define AT91C_TC1_RA

#define AT91C_TC1_RC

#define AT91C_TC1_IMR

#define AT91C_TC1_CV

#define AT91C_TC2_CMR

#define AT91C_TC2_CCR

#define AT91C_TC2_CV

#define AT91C_TC2_RA

#define AT91C_TC2_RB

#define AT91C_TC2_IDR

#define AT91C_TC2_IMR

#define AT91C_TC2_RC

#define AT91C_TC2_IER

#define AT91C_TC2_SR

#define AT91C_TCB_BMR

#define AT91C_TCB_BCR

#define AT91C_PWMC_CH3_CUPDR

#define AT91C_PWMC_CH3_Reserved

#define AT91C_PWMC_CH3_CPRDR

#define AT91C_PWMC_CH3_CDTYR

#define AT91C_PWMC_CH3_CCNTR

#define AT91C_PWMC_CH3_CMR

#define AT91C_PWMC_CH2_Reserved

#define AT91C_PWMC_CH2_CMR

#define AT91C_PWMC_CH2_CCNTR

#define AT91C_PWMC_CH2_CPRDR

#define AT91C_PWMC_CH2_CUPDR

#define AT91C_PWMC_CH2_CDTYR

#define AT91C_PWMC_CH1_Reserved

#define AT91C_PWMC_CH1_CUPDR

#define AT91C_PWMC_CH1_CPRDR

#define AT91C_PWMC_CH1_CCNTR

#define AT91C_PWMC_CH1_CDTYR

#define AT91C_PWMC_CH1_CMR

#define AT91C_PWMC_CH0_Reserved

#define AT91C_PWMC_CH0_CPRDR

#define AT91C_PWMC_CH0_CDTYR

#define AT91C_PWMC_CH0_CMR

#define AT91C_PWMC_CH0_CUPDR

#define AT91C_PWMC_CH0_CCNTR

#define AT91C_PWMC_IDR

#define AT91C_PWMC_DIS

#define AT91C_PWMC_IER

#define AT91C_PWMC_VR

#define AT91C_PWMC_ISR

#define AT91C_PWMC_SR

#define AT91C_PWMC_IMR

#define AT91C_PWMC_MR

#define AT91C_PWMC_ENA

#define AT91C_UDP_IMR

#define AT91C_UDP_FADDR

#define AT91C_UDP_NUM

#define AT91C_UDP_FDR

#define AT91C_UDP_ISR

#define AT91C_UDP_CSR

#define AT91C_UDP_IDR

#define AT91C_UDP_ICR

#define AT91C_UDP_RSTEP

#define AT91C_UDP_TXVC

#define AT91C_UDP_GLBSTATE

#define AT91C_UDP_IER

#define AT91C_PIO_PA0

#define AT91C_PA0_PWM0

#define AT91C_PA0_TIOA0

#define AT91C_PIO_PA1

#define AT91C_PA1_PWM1

#define AT91C_PA1_TIOB0

#define AT91C_PIO_PA10

#define AT91C_PA10_DTXD

#define AT91C_PA10_NPCS2

#define AT91C_PIO_PA11

#define AT91C_PA11_NPCS0

#define AT91C_PA11_PWM0

#define AT91C_PIO_PA12

#define AT91C_PA12_MISO

#define AT91C_PA12_PWM1

#define AT91C_PIO_PA13

#define AT91C_PA13_MOSI

#define AT91C_PA13_PWM2

#define AT91C_PIO_PA14

#define AT91C_PA14_SPCK

#define AT91C_PA14_PWM3

#define AT91C_PIO_PA15

#define AT91C_PA15_TF

#define AT91C_PA15_TIOA1

#define AT91C_PIO_PA16

#define AT91C_PA16_TK

#define AT91C_PA16_TIOB1

#define AT91C_PIO_PA17

#define AT91C_PA17_TD

#define AT91C_PA17_PCK1

#define AT91C_PIO_PA18

#define AT91C_PA18_RD

#define AT91C_PA18_PCK2

#define AT91C_PIO_PA19

#define AT91C_PA19_RK

#define AT91C_PA19_FIQ

#define AT91C_PIO_PA2

#define AT91C_PA2_PWM2

#define AT91C_PA2_SCK0

#define AT91C_PIO_PA20

#define AT91C_PA20_RF

#define AT91C_PA20_IRQ0

#define AT91C_PIO_PA21

#define AT91C_PA21_RXD1

#define AT91C_PA21_PCK1

#define AT91C_PIO_PA22

#define AT91C_PA22_TXD1

#define AT91C_PA22_NPCS3

#define AT91C_PIO_PA23

#define AT91C_PA23_SCK1

#define AT91C_PA23_PWM0

#define AT91C_PIO_PA24

#define AT91C_PA24_RTS1

#define AT91C_PA24_PWM1

#define AT91C_PIO_PA25

#define AT91C_PA25_CTS1

#define AT91C_PA25_PWM2

#define AT91C_PIO_PA26

#define AT91C_PA26_DCD1

#define AT91C_PA26_TIOA2

#define AT91C_PIO_PA27

#define AT91C_PA27_DTR1

#define AT91C_PA27_TIOB2

#define AT91C_PIO_PA28

#define AT91C_PA28_DSR1

#define AT91C_PA28_TCLK1

#define AT91C_PIO_PA29

#define AT91C_PA29_RI1

#define AT91C_PA29_TCLK2

#define AT91C_PIO_PA3

#define AT91C_PA3_TWD

#define AT91C_PA3_NPCS3

#define AT91C_PIO_PA30

#define AT91C_PA30_IRQ1

#define AT91C_PA30_NPCS2

#define AT91C_PIO_PA31

#define AT91C_PA31_NPCS1

#define AT91C_PA31_PCK2

#define AT91C_PIO_PA4

#define AT91C_PA4_TWCK

#define AT91C_PA4_TCLK0

#define AT91C_PIO_PA5

#define AT91C_PA5_RXD0

#define AT91C_PA5_NPCS3

#define AT91C_PIO_PA6

#define AT91C_PA6_TXD0

#define AT91C_PA6_PCK0

#define AT91C_PIO_PA7

#define AT91C_PA7_RTS0

#define AT91C_PA7_PWM3

#define AT91C_PIO_PA8

#define AT91C_PA8_CTS0

#define AT91C_PA8_ADTRG

#define AT91C_PIO_PA9

#define AT91C_PA9_DRXD

#define AT91C_PA9_NPCS1

#define AT91C_ID_FIQ

#define AT91C_ID_SYS

#define AT91C_ID_PIOA

#define AT91C_ID_3_Reserved

#define AT91C_ID_ADC

#define AT91C_ID_SPI

#define AT91C_ID_US0

#define AT91C_ID_US1

#define AT91C_ID_SSC

#define AT91C_ID_TWI

#define AT91C_ID_PWMC

#define AT91C_ID_UDP

#define AT91C_ID_TC0

#define AT91C_ID_TC1

#define AT91C_ID_TC2

#define AT91C_ID_15_Reserved

#define AT91C_ID_16_Reserved

#define AT91C_ID_17_Reserved

#define AT91C_ID_18_Reserved

#define AT91C_ID_19_Reserved

#define AT91C_ID_20_Reserved

#define AT91C_ID_21_Reserved

#define AT91C_ID_22_Reserved

#define AT91C_ID_23_Reserved

#define AT91C_ID_24_Reserved

#define AT91C_ID_25_Reserved

#define AT91C_ID_26_Reserved

#define AT91C_ID_27_Reserved

#define AT91C_ID_28_Reserved

#define AT91C_ID_29_Reserved

#define AT91C_ID_IRQ0

#define AT91C_ID_IRQ1

#define AT91C_ALL_INT

#define AT91C_BASE_SYS

#define AT91C_BASE_AIC

#define AT91C_BASE_PDC_DBGU

#define AT91C_BASE_DBGU

#define AT91C_BASE_PIOA

#define AT91C_BASE_CKGR

#define AT91C_BASE_PMC

#define AT91C_BASE_RSTC

#define AT91C_BASE_RTTC

#define AT91C_BASE_PITC

#define AT91C_BASE_WDTC

#define AT91C_BASE_VREG

#define AT91C_BASE_MC

#define AT91C_BASE_PDC_SPI

#define AT91C_BASE_SPI

#define AT91C_BASE_PDC_ADC

#define AT91C_BASE_ADC

#define AT91C_BASE_PDC_SSC

#define AT91C_BASE_SSC

#define AT91C_BASE_PDC_US1

#define AT91C_BASE_US1

#define AT91C_BASE_PDC_US0

#define AT91C_BASE_US0

#define AT91C_BASE_TWI

#define AT91C_BASE_TC0

#define AT91C_BASE_TC1

#define AT91C_BASE_TC2

#define AT91C_BASE_TCB

#define AT91C_BASE_PWMC_CH3

#define AT91C_BASE_PWMC_CH2

#define AT91C_BASE_PWMC_CH1

#define AT91C_BASE_PWMC_CH0

#define AT91C_BASE_PWMC

#define AT91C_BASE_UDP

Typedef AT91_REG

typedef volatile unsigned int AT91_REG

Typedef AT91S_SYS

typedef struct _AT91S_SYS AT91S_SYS
struct _AT91S_SYS  
   {  
      AT91_REG AIC_SMR[32];  
      AT91_REG AIC_SVR[32];  
      AT91_REG AIC_IVR;  
      AT91_REG AIC_FVR;  
      AT91_REG AIC_ISR;  
      AT91_REG AIC_IPR;  
      AT91_REG AIC_IMR;  
      AT91_REG AIC_CISR;  
      AT91_REG Reserved0[2];  
      AT91_REG AIC_IECR;  
      AT91_REG AIC_IDCR;  
      AT91_REG AIC_ICCR;  
      AT91_REG AIC_ISCR;  
      AT91_REG AIC_EOICR;  
      AT91_REG AIC_SPU;  
      AT91_REG AIC_DCR;  
      AT91_REG Reserved1[1];  
      AT91_REG AIC_FFER;  
      AT91_REG AIC_FFDR;  
      AT91_REG AIC_FFSR;  
      AT91_REG Reserved2[45];  
      AT91_REG DBGU_CR;  
      AT91_REG DBGU_MR;  
      AT91_REG DBGU_IER;  
      AT91_REG DBGU_IDR;  
      AT91_REG DBGU_IMR;  
      AT91_REG DBGU_CSR;  
      AT91_REG DBGU_RHR;  
      AT91_REG DBGU_THR;  
      AT91_REG DBGU_BRGR;  
      AT91_REG Reserved3[7];  
      AT91_REG DBGU_CIDR;  
      AT91_REG DBGU_EXID;  
      AT91_REG DBGU_FNTR;  
      AT91_REG Reserved4[45];  
      AT91_REG DBGU_RPR;  
      AT91_REG DBGU_RCR;  
      AT91_REG DBGU_TPR;  
      AT91_REG DBGU_TCR;  
      AT91_REG DBGU_RNPR;  
      AT91_REG DBGU_RNCR;  
      AT91_REG DBGU_TNPR;  
      AT91_REG DBGU_TNCR;  
      AT91_REG DBGU_PTCR;  
      AT91_REG DBGU_PTSR;  
      AT91_REG Reserved5[54];  
      AT91_REG PIOA_PER;  
      AT91_REG PIOA_PDR;  
      AT91_REG PIOA_PSR;  
      AT91_REG Reserved6[1];  
      AT91_REG PIOA_OER;  
      AT91_REG PIOA_ODR;  
      AT91_REG PIOA_OSR;  
      AT91_REG Reserved7[1];  
      AT91_REG PIOA_IFER;  
      AT91_REG PIOA_IFDR;  
      AT91_REG PIOA_IFSR;  
      AT91_REG Reserved8[1];  
      AT91_REG PIOA_SODR;  
      AT91_REG PIOA_CODR;  
      AT91_REG PIOA_ODSR;  
      AT91_REG PIOA_PDSR;  
      AT91_REG PIOA_IER;  
      AT91_REG PIOA_IDR;  
      AT91_REG PIOA_IMR;  
      AT91_REG PIOA_ISR;  
      AT91_REG PIOA_MDER;  
      AT91_REG PIOA_MDDR;  
      AT91_REG PIOA_MDSR;  
      AT91_REG Reserved9[1];  
      AT91_REG PIOA_PPUDR;  
      AT91_REG PIOA_PPUER;  
      AT91_REG PIOA_PPUSR;  
      AT91_REG Reserved10[1];  
      AT91_REG PIOA_ASR;  
      AT91_REG PIOA_BSR;  
      AT91_REG PIOA_ABSR;  
      AT91_REG Reserved11[9];  
      AT91_REG PIOA_OWER;  
      AT91_REG PIOA_OWDR;  
      AT91_REG PIOA_OWSR;  
      AT91_REG Reserved12[469];  
      AT91_REG PMC_SCER;  
      AT91_REG PMC_SCDR;  
      AT91_REG PMC_SCSR;  
      AT91_REG Reserved13[1];  
      AT91_REG PMC_PCER;  
      AT91_REG PMC_PCDR;  
      AT91_REG PMC_PCSR;  
      AT91_REG Reserved14[1];  
      AT91_REG PMC_MOR;  
      AT91_REG PMC_MCFR;  
      AT91_REG Reserved15[1];  
      AT91_REG PMC_PLLR;  
      AT91_REG PMC_MCKR;  
      AT91_REG Reserved16[3];  
      AT91_REG PMC_PCKR[3];  
      AT91_REG Reserved17[5];  
      AT91_REG PMC_IER;  
      AT91_REG PMC_IDR;  
      AT91_REG PMC_SR;  
      AT91_REG PMC_IMR;  
      AT91_REG Reserved18[36];  
      AT91_REG RSTC_RCR;  
      AT91_REG RSTC_RSR;  
      AT91_REG RSTC_RMR;  
      AT91_REG Reserved19[5];  
      AT91_REG RTTC_RTMR;  
      AT91_REG RTTC_RTAR;  
      AT91_REG RTTC_RTVR;  
      AT91_REG RTTC_RTSR;  
      AT91_REG PITC_PIMR;  
      AT91_REG PITC_PISR;  
      AT91_REG PITC_PIVR;  
      AT91_REG PITC_PIIR;  
      AT91_REG WDTC_WDCR;  
      AT91_REG WDTC_WDMR;  
      AT91_REG WDTC_WDSR;  
      AT91_REG Reserved20[5];  
      AT91_REG VREG_MR;  
   }  

Typedef AT91PS_SYS

typedef struct _AT91S_SYS* AT91PS_SYS
See: Typedef AT91S_SYS

Typedef AT91S_AIC

typedef struct _AT91S_AIC AT91S_AIC
struct _AT91S_AIC  
   {  
      AT91_REG AIC_SMR[32];  
      AT91_REG AIC_SVR[32];  
      AT91_REG AIC_IVR;  
      AT91_REG AIC_FVR;  
      AT91_REG AIC_ISR;  
      AT91_REG AIC_IPR;  
      AT91_REG AIC_IMR;  
      AT91_REG AIC_CISR;  
      AT91_REG Reserved0[2];  
      AT91_REG AIC_IECR;  
      AT91_REG AIC_IDCR;  
      AT91_REG AIC_ICCR;  
      AT91_REG AIC_ISCR;  
      AT91_REG AIC_EOICR;  
      AT91_REG AIC_SPU;  
      AT91_REG AIC_DCR;  
      AT91_REG Reserved1[1];  
      AT91_REG AIC_FFER;  
      AT91_REG AIC_FFDR;  
      AT91_REG AIC_FFSR;  
   }  

Typedef AT91PS_AIC

typedef struct _AT91S_AIC* AT91PS_AIC
See: Typedef AT91S_AIC

Typedef AT91S_PDC

typedef struct _AT91S_PDC AT91S_PDC
struct _AT91S_PDC  
   {  
      AT91_REG PDC_RPR;  
      AT91_REG PDC_RCR;  
      AT91_REG PDC_TPR;  
      AT91_REG PDC_TCR;  
      AT91_REG PDC_RNPR;  
      AT91_REG PDC_RNCR;  
      AT91_REG PDC_TNPR;  
      AT91_REG PDC_TNCR;  
      AT91_REG PDC_PTCR;  
      AT91_REG PDC_PTSR;  
   }  

Typedef AT91PS_PDC

typedef struct _AT91S_PDC* AT91PS_PDC
See: Typedef AT91S_PDC

Typedef AT91S_DBGU

typedef struct _AT91S_DBGU AT91S_DBGU
struct _AT91S_DBGU  
   {  
      AT91_REG DBGU_CR;  
      AT91_REG DBGU_MR;  
      AT91_REG DBGU_IER;  
      AT91_REG DBGU_IDR;  
      AT91_REG DBGU_IMR;  
      AT91_REG DBGU_CSR;  
      AT91_REG DBGU_RHR;  
      AT91_REG DBGU_THR;  
      AT91_REG DBGU_BRGR;  
      AT91_REG Reserved0[7];  
      AT91_REG DBGU_CIDR;  
      AT91_REG DBGU_EXID;  
      AT91_REG DBGU_FNTR;  
      AT91_REG Reserved1[45];  
      AT91_REG DBGU_RPR;  
      AT91_REG DBGU_RCR;  
      AT91_REG DBGU_TPR;  
      AT91_REG DBGU_TCR;  
      AT91_REG DBGU_RNPR;  
      AT91_REG DBGU_RNCR;  
      AT91_REG DBGU_TNPR;  
      AT91_REG DBGU_TNCR;  
      AT91_REG DBGU_PTCR;  
      AT91_REG DBGU_PTSR;  
   }  

Typedef AT91PS_DBGU

typedef struct _AT91S_DBGU* AT91PS_DBGU
See: Typedef AT91S_DBGU

Typedef AT91S_PIO

typedef struct _AT91S_PIO AT91S_PIO
struct _AT91S_PIO  
   {  
      AT91_REG PIO_PER;  
      AT91_REG PIO_PDR;  
      AT91_REG PIO_PSR;  
      AT91_REG Reserved0[1];  
      AT91_REG PIO_OER;  
      AT91_REG PIO_ODR;  
      AT91_REG PIO_OSR;  
      AT91_REG Reserved1[1];  
      AT91_REG PIO_IFER;  
      AT91_REG PIO_IFDR;  
      AT91_REG PIO_IFSR;  
      AT91_REG Reserved2[1];  
      AT91_REG PIO_SODR;  
      AT91_REG PIO_CODR;  
      AT91_REG PIO_ODSR;  
      AT91_REG PIO_PDSR;  
      AT91_REG PIO_IER;  
      AT91_REG PIO_IDR;  
      AT91_REG PIO_IMR;  
      AT91_REG PIO_ISR;  
      AT91_REG PIO_MDER;  
      AT91_REG PIO_MDDR;  
      AT91_REG PIO_MDSR;  
      AT91_REG Reserved3[1];  
      AT91_REG PIO_PPUDR;  
      AT91_REG PIO_PPUER;  
      AT91_REG PIO_PPUSR;  
      AT91_REG Reserved4[1];  
      AT91_REG PIO_ASR;  
      AT91_REG PIO_BSR;  
      AT91_REG PIO_ABSR;  
      AT91_REG Reserved5[9];  
      AT91_REG PIO_OWER;  
      AT91_REG PIO_OWDR;  
      AT91_REG PIO_OWSR;  
   }  

Typedef AT91PS_PIO

typedef struct _AT91S_PIO* AT91PS_PIO
See: Typedef AT91S_PIO

Typedef AT91S_CKGR

typedef struct _AT91S_CKGR AT91S_CKGR
struct _AT91S_CKGR  
   {  
      AT91_REG CKGR_MOR;  
      AT91_REG CKGR_MCFR;  
      AT91_REG Reserved0[1];  
      AT91_REG CKGR_PLLR;  
   }  

Typedef AT91PS_CKGR

typedef struct _AT91S_CKGR* AT91PS_CKGR
See: Typedef AT91S_CKGR

Typedef AT91S_PMC

typedef struct _AT91S_PMC AT91S_PMC
struct _AT91S_PMC  
   {  
      AT91_REG PMC_SCER;  
      AT91_REG PMC_SCDR;  
      AT91_REG PMC_SCSR;  
      AT91_REG Reserved0[1];  
      AT91_REG PMC_PCER;  
      AT91_REG PMC_PCDR;  
      AT91_REG PMC_PCSR;  
      AT91_REG Reserved1[1];  
      AT91_REG PMC_MOR;  
      AT91_REG PMC_MCFR;  
      AT91_REG Reserved2[1];  
      AT91_REG PMC_PLLR;  
      AT91_REG PMC_MCKR;  
      AT91_REG Reserved3[3];  
      AT91_REG PMC_PCKR[3];  
      AT91_REG Reserved4[5];  
      AT91_REG PMC_IER;  
      AT91_REG PMC_IDR;  
      AT91_REG PMC_SR;  
      AT91_REG PMC_IMR;  
   }  

Typedef AT91PS_PMC

typedef struct _AT91S_PMC* AT91PS_PMC
See: Typedef AT91S_PMC

Typedef AT91S_RSTC

typedef struct _AT91S_RSTC AT91S_RSTC
struct _AT91S_RSTC  
   {  
      AT91_REG RSTC_RCR;  
      AT91_REG RSTC_RSR;  
      AT91_REG RSTC_RMR;  
   }  

Typedef AT91PS_RSTC

typedef struct _AT91S_RSTC* AT91PS_RSTC
See: Typedef AT91S_RSTC

Typedef AT91S_RTTC

typedef struct _AT91S_RTTC AT91S_RTTC
struct _AT91S_RTTC  
   {  
      AT91_REG RTTC_RTMR;  
      AT91_REG RTTC_RTAR;  
      AT91_REG RTTC_RTVR;  
      AT91_REG RTTC_RTSR;  
   }  

Typedef AT91PS_RTTC

typedef struct _AT91S_RTTC* AT91PS_RTTC
See: Typedef AT91S_RTTC

Typedef AT91S_PITC

typedef struct _AT91S_PITC AT91S_PITC
struct _AT91S_PITC  
   {  
      AT91_REG PITC_PIMR;  
      AT91_REG PITC_PISR;  
      AT91_REG PITC_PIVR;  
      AT91_REG PITC_PIIR;  
   }  

Typedef AT91PS_PITC

typedef struct _AT91S_PITC* AT91PS_PITC
See: Typedef AT91S_PITC

Typedef AT91S_WDTC

typedef struct _AT91S_WDTC AT91S_WDTC
struct _AT91S_WDTC  
   {  
      AT91_REG WDTC_WDCR;  
      AT91_REG WDTC_WDMR;  
      AT91_REG WDTC_WDSR;  
   }  

Typedef AT91PS_WDTC

typedef struct _AT91S_WDTC* AT91PS_WDTC
See: Typedef AT91S_WDTC

Typedef AT91S_VREG

typedef struct _AT91S_VREG AT91S_VREG
struct _AT91S_VREG  
   {  
      AT91_REG VREG_MR;  
   }  

Typedef AT91PS_VREG

typedef struct _AT91S_VREG* AT91PS_VREG
See: Typedef AT91S_VREG

Typedef AT91S_MC

typedef struct _AT91S_MC AT91S_MC
struct _AT91S_MC  
   {  
      AT91_REG MC_RCR;  
      AT91_REG MC_ASR;  
      AT91_REG MC_AASR;  
      AT91_REG Reserved0[21];  
      AT91_REG MC_FMR;  
      AT91_REG MC_FCR;  
      AT91_REG MC_FSR;  
   }  

Typedef AT91PS_MC

typedef struct _AT91S_MC* AT91PS_MC
See: Typedef AT91S_MC

Typedef AT91S_SPI

typedef struct _AT91S_SPI AT91S_SPI
struct _AT91S_SPI  
   {  
      AT91_REG SPI_CR;  
      AT91_REG SPI_MR;  
      AT91_REG SPI_RDR;  
      AT91_REG SPI_TDR;  
      AT91_REG SPI_SR;  
      AT91_REG SPI_IER;  
      AT91_REG SPI_IDR;  
      AT91_REG SPI_IMR;  
      AT91_REG Reserved0[4];  
      AT91_REG SPI_CSR[4];  
      AT91_REG Reserved1[48];  
      AT91_REG SPI_RPR;  
      AT91_REG SPI_RCR;  
      AT91_REG SPI_TPR;  
      AT91_REG SPI_TCR;  
      AT91_REG SPI_RNPR;  
      AT91_REG SPI_RNCR;  
      AT91_REG SPI_TNPR;  
      AT91_REG SPI_TNCR;  
      AT91_REG SPI_PTCR;  
      AT91_REG SPI_PTSR;  
   }  

Typedef AT91PS_SPI

typedef struct _AT91S_SPI* AT91PS_SPI
See: Typedef AT91S_SPI

Typedef AT91S_ADC

typedef struct _AT91S_ADC AT91S_ADC
struct _AT91S_ADC  
   {  
      AT91_REG ADC_CR;  
      AT91_REG ADC_MR;  
      AT91_REG Reserved0[2];  
      AT91_REG ADC_CHER;  
      AT91_REG ADC_CHDR;  
      AT91_REG ADC_CHSR;  
      AT91_REG ADC_SR;  
      AT91_REG ADC_LCDR;  
      AT91_REG ADC_IER;  
      AT91_REG ADC_IDR;  
      AT91_REG ADC_IMR;  
      AT91_REG ADC_CDR0;  
      AT91_REG ADC_CDR1;  
      AT91_REG ADC_CDR2;  
      AT91_REG ADC_CDR3;  
      AT91_REG ADC_CDR4;  
      AT91_REG ADC_CDR5;  
      AT91_REG ADC_CDR6;  
      AT91_REG ADC_CDR7;  
      AT91_REG Reserved1[44];  
      AT91_REG ADC_RPR;  
      AT91_REG ADC_RCR;  
      AT91_REG ADC_TPR;  
      AT91_REG ADC_TCR;  
      AT91_REG ADC_RNPR;  
      AT91_REG ADC_RNCR;  
      AT91_REG ADC_TNPR;  
      AT91_REG ADC_TNCR;  
      AT91_REG ADC_PTCR;  
      AT91_REG ADC_PTSR;  
   }  

Typedef AT91PS_ADC

typedef struct _AT91S_ADC* AT91PS_ADC
See: Typedef AT91S_ADC

Typedef AT91S_SSC

typedef struct _AT91S_SSC AT91S_SSC
struct _AT91S_SSC  
   {  
      AT91_REG SSC_CR;  
      AT91_REG SSC_CMR;  
      AT91_REG Reserved0[2];  
      AT91_REG SSC_RCMR;  
      AT91_REG SSC_RFMR;  
      AT91_REG SSC_TCMR;  
      AT91_REG SSC_TFMR;  
      AT91_REG SSC_RHR;  
      AT91_REG SSC_THR;  
      AT91_REG Reserved1[2];  
      AT91_REG SSC_RSHR;  
      AT91_REG SSC_TSHR;  
      AT91_REG Reserved2[2];  
      AT91_REG SSC_SR;  
      AT91_REG SSC_IER;  
      AT91_REG SSC_IDR;  
      AT91_REG SSC_IMR;  
      AT91_REG Reserved3[44];  
      AT91_REG SSC_RPR;  
      AT91_REG SSC_RCR;  
      AT91_REG SSC_TPR;  
      AT91_REG SSC_TCR;  
      AT91_REG SSC_RNPR;  
      AT91_REG SSC_RNCR;  
      AT91_REG SSC_TNPR;  
      AT91_REG SSC_TNCR;  
      AT91_REG SSC_PTCR;  
      AT91_REG SSC_PTSR;  
   }  

Typedef AT91PS_SSC

typedef struct _AT91S_SSC* AT91PS_SSC
See: Typedef AT91S_SSC

Typedef AT91S_USART

typedef struct _AT91S_USART AT91S_USART
struct _AT91S_USART  
   {  
      AT91_REG US_CR;  
      AT91_REG US_MR;  
      AT91_REG US_IER;  
      AT91_REG US_IDR;  
      AT91_REG US_IMR;  
      AT91_REG US_CSR;  
      AT91_REG US_RHR;  
      AT91_REG US_THR;  
      AT91_REG US_BRGR;  
      AT91_REG US_RTOR;  
      AT91_REG US_TTGR;  
      AT91_REG Reserved0[5];  
      AT91_REG US_FIDI;  
      AT91_REG US_NER;  
      AT91_REG Reserved1[1];  
      AT91_REG US_IF;  
      AT91_REG Reserved2[44];  
      AT91_REG US_RPR;  
      AT91_REG US_RCR;  
      AT91_REG US_TPR;  
      AT91_REG US_TCR;  
      AT91_REG US_RNPR;  
      AT91_REG US_RNCR;  
      AT91_REG US_TNPR;  
      AT91_REG US_TNCR;  
      AT91_REG US_PTCR;  
      AT91_REG US_PTSR;  
   }  

Typedef AT91PS_USART

typedef struct _AT91S_USART* AT91PS_USART
See: Typedef AT91S_USART

Typedef AT91S_TWI

typedef struct _AT91S_TWI AT91S_TWI
struct _AT91S_TWI  
   {  
      AT91_REG TWI_CR;  
      AT91_REG TWI_MMR;  
      AT91_REG Reserved0[1];  
      AT91_REG TWI_IADR;  
      AT91_REG TWI_CWGR;  
      AT91_REG Reserved1[3];  
      AT91_REG TWI_SR;  
      AT91_REG TWI_IER;  
      AT91_REG TWI_IDR;  
      AT91_REG TWI_IMR;  
      AT91_REG TWI_RHR;  
      AT91_REG TWI_THR;  
   }  

Typedef AT91PS_TWI

typedef struct _AT91S_TWI* AT91PS_TWI
See: Typedef AT91S_TWI

Typedef AT91S_TC

typedef struct _AT91S_TC AT91S_TC
struct _AT91S_TC  
   {  
      AT91_REG TC_CCR;  
      AT91_REG TC_CMR;  
      AT91_REG Reserved0[2];  
      AT91_REG TC_CV;  
      AT91_REG TC_RA;  
      AT91_REG TC_RB;  
      AT91_REG TC_RC;  
      AT91_REG TC_SR;  
      AT91_REG TC_IER;  
      AT91_REG TC_IDR;  
      AT91_REG TC_IMR;  
   }  

Typedef AT91PS_TC

typedef struct _AT91S_TC* AT91PS_TC
See: Typedef AT91S_TC

Typedef AT91S_TCB

typedef struct _AT91S_TCB AT91S_TCB
struct _AT91S_TCB  
   {  
      AT91S_TC TCB_TC0;  
      AT91_REG Reserved0[4];  
      AT91S_TC TCB_TC1;  
      AT91_REG Reserved1[4];  
      AT91S_TC TCB_TC2;  
      AT91_REG Reserved2[4];  
      AT91_REG TCB_BCR;  
      AT91_REG TCB_BMR;  
   }  

Typedef AT91PS_TCB

typedef struct _AT91S_TCB* AT91PS_TCB
See: Typedef AT91S_TCB

Typedef AT91S_PWMC_CH

typedef struct _AT91S_PWMC_CH AT91S_PWMC_CH
struct _AT91S_PWMC_CH  
   {  
      AT91_REG PWMC_CMR;  
      AT91_REG PWMC_CDTYR;  
      AT91_REG PWMC_CPRDR;  
      AT91_REG PWMC_CCNTR;  
      AT91_REG PWMC_CUPDR;  
      AT91_REG PWMC_Reserved[3];  
   }  

Typedef AT91PS_PWMC_CH

typedef struct _AT91S_PWMC_CH* AT91PS_PWMC_CH
See: Typedef AT91S_PWMC_CH

Typedef AT91S_PWMC

typedef struct _AT91S_PWMC AT91S_PWMC
struct _AT91S_PWMC  
   {  
      AT91_REG PWMC_MR;  
      AT91_REG PWMC_ENA;  
      AT91_REG PWMC_DIS;  
      AT91_REG PWMC_SR;  
      AT91_REG PWMC_IER;  
      AT91_REG PWMC_IDR;  
      AT91_REG PWMC_IMR;  
      AT91_REG PWMC_ISR;  
      AT91_REG Reserved0[55];  
      AT91_REG PWMC_VR;  
      AT91_REG Reserved1[64];  
      AT91S_PWMC_CH PWMC_CH[4];  
   }  

Typedef AT91PS_PWMC

typedef struct _AT91S_PWMC* AT91PS_PWMC
See: Typedef AT91S_PWMC

Typedef AT91S_UDP

typedef struct _AT91S_UDP AT91S_UDP
struct _AT91S_UDP  
   {  
      AT91_REG UDP_NUM;  
      AT91_REG UDP_GLBSTATE;  
      AT91_REG UDP_FADDR;  
      AT91_REG Reserved0[1];  
      AT91_REG UDP_IER;  
      AT91_REG UDP_IDR;  
      AT91_REG UDP_IMR;  
      AT91_REG UDP_ISR;  
      AT91_REG UDP_ICR;  
      AT91_REG Reserved1[1];  
      AT91_REG UDP_RSTEP;  
      AT91_REG Reserved2[1];  
      AT91_REG UDP_CSR[4];  
      AT91_REG Reserved3[4];  
      AT91_REG UDP_FDR[4];  
      AT91_REG Reserved4[5];  
      AT91_REG UDP_TXVC;  
   }  

Typedef AT91PS_UDP

typedef struct _AT91S_UDP* AT91PS_UDP
See: Typedef AT91S_UDP