#define ADC_CR_OFF 0x00000000
#define ADC_CR
#define ADC_SWRST 0x00000001
#define ADC_START 0x00000002
#define ADC_MR_OFF 0x00000004
#define ADC_MR
#define ADC_TRGEN 0x00000001
#define ADC_TRGSEL 0x0000000E
#define ADC_TRGSEL_TIOA0 0x00000000
#define ADC_TRGSEL_TIOA1 0x00000002
#define ADC_TRGSEL_TIOA2 0x00000004
#define ADC_TRGSEL_EXT 0x0000000C
#define ADC_LOWRES 0x00000010
#define ADC_SLEEP 0x00000020
#define ADC_PRESCAL 0x00003F00
#define ADC_PRESCAL_LSB 8
#define ADC_STARTUP 0x001F0000
#define ADC_STARTUP_LSB 16
#define ADC_SHTIM 0x0F000000
#define ADC_SHTIM_LSB 24
#define ADC_CHER_OFF 0x00000010
#define ADC_CHER
#define ADC_CH( x )
#define ADC_CH0 0x00000001
#define ADC_CH1 0x00000002
#define ADC_CH2 0x00000004
#define ADC_CH3 0x00000008
#define ADC_CH4 0x00000010
#define ADC_CH5 0x00000020
#define ADC_CH6 0x00000040
#define ADC_CH7 0x00000080
#define ADC_CHDR_OFF 0x00000014
#define ADC_CHDR
#define ADC_CHSR_OFF 0x00000018
#define ADC_CHSR
#define ADC_SR_OFF 0x0000001C
#define ADC_SR
#define ADC_EOC( x )
#define ADC_EOC0 0x00000001
#define ADC_EOC1 0x00000002
#define ADC_EOC2 0x00000004
#define ADC_EOC3 0x00000008
#define ADC_EOC4 0x00000010
#define ADC_EOC5 0x00000020
#define ADC_EOC6 0x00000040
#define ADC_EOC7 0x00000080
#define ADC_OVRE( x )
#define ADC_OVRE0 0x00000100
#define ADC_OVRE1 0x00000200
#define ADC_OVRE2 0x00000400
#define ADC_OVRE3 0x00000800
#define ADC_OVRE4 0x00001000
#define ADC_OVRE5 0x00002000
#define ADC_OVRE6 0x00004000
#define ADC_OVRE7 0x00008000
#define ADC_DRDY 0x00010000
#define ADC_GOVRE 0x00020000
#define ADC_ENDRX 0x00040000
#define ADC_RXBUF 0x00080000
#define ADC_LCDR_OFF 0x00000020
#define ADC_LCDR
#define ADC_LCDR_MASK 0x000003FF
#define ADC_IER_OFF 0x00000024
#define ADC_IER
#define ADC_IDR_OFF 0x00000028
#define ADC_IDR
#define ADC_IMR_OFF 0x0000002C
#define ADC_IMR
#define ADC_CDR_OFF 0x00000030
#define ADC_CDR( x )
#define ADC_CDR_MASK 0x000003FF