#define SDRAMC_MR_OFF 0x00000000
#define SDRAMC_MR
#define SDRAMC_MODE 0x00000007
#define SDRAMC_MODE_NORMAL 0x00000000
#define SDRAMC_MODE_NOP 0x00000001
#define SDRAMC_MODE_PRCGALL 0x00000002
#define SDRAMC_MODE_LMR 0x00000003
#define SDRAMC_MODE_RFSH 0x00000004
#define SDRAMC_MODE_EXT_LMR 0x00000005
#define SDRAMC_MODE_DEEP 0x00000006
#define SDRAMC_TR_OFF 0x00000004
#define SDRAMC_TR
#define SDRAMC_COUNT 0x00000FFF
#define SDRAMC_CR_OFF 0x00000008
#define SDRAMC_CR
#define SDRAMC_NC 0x00000003
#define SDRAMC_NC_8 0x00000000
#define SDRAMC_NC_9 0x00000001
#define SDRAMC_NC_10 0x00000002
#define SDRAMC_NC_11 0x00000003
#define SDRAMC_NR 0x0000000C
#define SDRAMC_NR_11 0x00000000
#define SDRAMC_NR_12 0x00000004
#define SDRAMC_NR_13 0x00000008
#define SDRAMC_NB 0x00000010
#define SDRAMC_CAS 0x00000060
#define SDRAMC_CAS_1 0x00000020
#define SDRAMC_CAS_2 0x00000040
#define SDRAMC_CAS_3 0x00000060
#define SDRAMC_DBW 0x00000080
#define SDRAMC_TWR 0x00000F00
#define SDRAMC_TWR_LSB 8
#define SDRAMC_TRC 0x0000F000
#define SDRAMC_TRC_LSB 12
#define SDRAMC_TRP 0x000F0000
#define SDRAMC_TRP_LSB 16
#define SDRAMC_TRCD 0x00F00000
#define SDRAMC_TRCD_LSB 20
#define SDRAMC_TRAS 0x0F000000
#define SDRAMC_TRAS_LSB 24
#define SDRAMC_TXSR 0xF0000000
#define SDRAMC_TXSR_LSB 28
#define SDRAMC_SRR_OFF 0x0000000C
#define SDRAMC_SRR
#define SDRAMC_SRCB 0x00000001
#define SDRAMC_LPR_OFF 0x00000010
#define SDRAMC_LPR
#define SDRAMC_LPCB 0x00000003
#define SDRAMC_LPCB_DISABLE 0x00000000
#define SDRAMC_LPCB_SELF_REFRESH 0x00000001
#define SDRAMC_LPCB_POWER_DOWN 0x00000002
#define SDRAMC_LPCB_DEEP_POWER_DOWN 0x00000003
#define SDRAMC_PASR 0x00000070
#define SDRAMC_PASR_LSB 4
#define SDRAMC_TCSR 0x00000300
#define SDRAMC_TCSR_LSB 8
#define SDRAMC_DS 0x00000C00
#define SDRAMC_DS_LSB 10
#define SDRAMC_TIMEOUT 0x00003000
#define SDRAMC_TIMEOUT_0 0x00000000
#define SDRAMC_TIMEOUT_64 0x00001000
#define SDRAMC_TIMEOUT_128 0x00002000
#define SDRAMC_IER_OFF 0x00000014
#define SDRAMC_IER
#define SDRAMC_IDR_OFF 0x00000018
#define SDRAMC_IDR
#define SDRAMC_IMR_OFF 0x0000001C
#define SDRAMC_IMR
#define SDRAMC_ISR_OFF 0x00000020
#define SDRAMC_ISR
#define SDRAMC_RES 0x00000001
#define SDRAMC_MDR_OFF 0x00000024
#define SDRAMC_MDR
#define SDRAMC_MD 0x00000003
#define SDRAMC_MD 0x00000003
#define SDRAMC_MD_SDRAM 0x00000000
#define SDRAMC_MD_LPSDRAM 0x00000001