#define SMC_SETUP( cs )
#define SMC_NWE_SETUP 0x0000003F
#define SMC_NWE_SETUP_LSB 0
#define SMC_NCS_WR_SETUP 0x00003F00
#define SMC_NCS_WR_SETUP_LSB 8
#define SMC_NRD_SETUP 0x003F0000
#define SMC_NRD_SETUP_LSB 16
#define SMC_NCS_RD_SETUP 0x3F000000
#define SMC_NCS_RD_SETUP_LSB 24
#define SMC_PULSE( cs )
#define SMC_NWE_PULSE 0x0000003F
#define SMC_NWE_PULSE_LSB 0
#define SMC_NCS_WR_PULSE 0x00003F00
#define SMC_NCS_WR_PULSE_LSB 8
#define SMC_NRD_PULSE 0x003F0000
#define SMC_NRD_PULSE_LSB 16
#define SMC_NCS_RD_PULSE 0x3F000000
#define SMC_NCS_RD_PULSE_LSB 24
#define SMC_CYCLE( cs )
#define SMC_NWE_CYCLE 0x000001FF
#define SMC_NWE_CYCLE_LSB 0
#define SMC_NRD_CYCLE 0x01FF0000
#define SMC_NRD_CYCLE_LSB 16
#define SMC_MODE( cs )
#define SMC_READ_MODE 0x00000001
#define SMC_WRITE_MODE 0x00000002
#define SMC_EXNW_MODE 0x00000030
#define SMC_EXNW_MODE_DISABLED 0x00000000
#define SMC_EXNW_MODE_FROZEN 0x00000020
#define SMC_EXNW_MODE_READY 0x00000030
#define SMC_BAT 0x00000100
#define SMC_DBW 0x00003000
#define SMC_DBW_8 0x00000000
#define SMC_DBW_16 0x00001000
#define SMC_DBW_32 0x00002000
#define SMC_TDF_CYCLES 0x000F0000
#define SMC_TDF_CYCLES_LSB 16
#define SMC_TDF_MODE 0x00100000
#define SMC_PMEN 0x01000000
#define SMC_PS 0x30000000
#define SMC_PS_4 0x00000000
#define SMC_PS_8 0x10000000
#define SMC_PS_16 0x20000000
#define SMC_PS_32 0x30000000