File nut/include/arch/cm3/atmel/sam3u.h

Preprocessor definitions

#define AT91_CAST( a )

#define AT91C_GPBR_GPRV

#define AT91C_HSMC4_NWE_SETUP

#define AT91C_HSMC4_NCS_WR_SETUP

#define AT91C_HSMC4_NRD_SETUP

#define AT91C_HSMC4_NCS_RD_SETUP

#define AT91C_HSMC4_NWE_PULSE

#define AT91C_HSMC4_NCS_WR_PULSE

#define AT91C_HSMC4_NRD_PULSE

#define AT91C_HSMC4_NCS_RD_PULSE

#define AT91C_HSMC4_NWE_CYCLE

#define AT91C_HSMC4_NRD_CYCLE

#define AT91C_HSMC4_TCLR

#define AT91C_HSMC4_TADL

#define AT91C_HSMC4_TAR

#define AT91C_HSMC4_OCMSEN

#define AT91C_HSMC4_TRR

#define AT91C_HSMC4_TWB

#define AT91C_HSMC4_RBNSEL

#define AT91C_HSMC4_NFSEL

#define AT91C_HSMC4_READ_MODE

#define AT91C_HSMC4_WRITE_MODE

#define AT91C_HSMC4_EXNW_MODE

#define AT91C_HSMC4_EXNW_MODE_NWAIT_DISABLE

#define AT91C_HSMC4_EXNW_MODE_NWAIT_ENABLE_FROZEN

#define AT91C_HSMC4_EXNW_MODE_NWAIT_ENABLE_READY

#define AT91C_HSMC4_BAT

#define AT91C_HSMC4_BAT_BYTE_SELECT

#define AT91C_HSMC4_BAT_BYTE_WRITE

#define AT91C_HSMC4_DBW

#define AT91C_HSMC4_DBW_WIDTH_EIGTH_BITS

#define AT91C_HSMC4_DBW_WIDTH_SIXTEEN_BITS

#define AT91C_HSMC4_DBW_WIDTH_THIRTY_TWO_BITS

#define AT91C_HSMC4_TDF_CYCLES

#define AT91C_HSMC4_TDF_MODE

#define AT91C_HSMC4_PMEN

#define AT91C_HSMC4_PS

#define AT91C_HSMC4_PS_SIZE_FOUR_BYTES

#define AT91C_HSMC4_PS_SIZE_EIGHT_BYTES

#define AT91C_HSMC4_PS_SIZE_SIXTEEN_BYTES

#define AT91C_HSMC4_PS_SIZE_THIRTY_TWO_BYTES

#define AT91C_HSMC4_PAGESIZE

#define AT91C_HSMC4_PAGESIZE_528_Bytes 0x0

#define AT91C_HSMC4_PAGESIZE_1056_Bytes 0x1

#define AT91C_HSMC4_PAGESIZE_2112_Bytes 0x2

#define AT91C_HSMC4_PAGESIZE_4224_Bytes 0x3

#define AT91C_HSMC4_WSPARE

#define AT91C_HSMC4_RSPARE

#define AT91C_HSMC4_EDGECTRL

#define AT91C_HSMC4_RBEDGE

#define AT91C_HSMC4_DTOCYC

#define AT91C_HSMC4_DTOMUL

#define AT91C_HSMC4_DTOMUL_1

#define AT91C_HSMC4_DTOMUL_16

#define AT91C_HSMC4_DTOMUL_128

#define AT91C_HSMC4_DTOMUL_256

#define AT91C_HSMC4_DTOMUL_1024

#define AT91C_HSMC4_DTOMUL_4096

#define AT91C_HSMC4_DTOMUL_65536

#define AT91C_HSMC4_DTOMUL_1048576

#define AT91C_HSMC4_NFCEN

#define AT91C_HSMC4_NFCDIS

#define AT91C_HSMC4_HOSTEN

#define AT91C_HSMC4_HOSTWR

#define AT91C_HSMC4_HOSTCSID

#define AT91C_HSMC4_HOSTCSID_0

#define AT91C_HSMC4_HOSTCSID_1

#define AT91C_HSMC4_HOSTCSID_2

#define AT91C_HSMC4_HOSTCSID_3

#define AT91C_HSMC4_HOSTCSID_4

#define AT91C_HSMC4_HOSTCSID_5

#define AT91C_HSMC4_HOSTCSID_6

#define AT91C_HSMC4_HOSTCSID_7

#define AT91C_HSMC4_VALID

#define AT91C_HSMC4_NFCSTS

#define AT91C_HSMC4_RBRISE

#define AT91C_HSMC4_RBFALL

#define AT91C_HSMC4_HOSTBUSY

#define AT91C_HSMC4_HOSTW

#define AT91C_HSMC4_HOSTCS

#define AT91C_HSMC4_HOSTCS_0

#define AT91C_HSMC4_HOSTCS_1

#define AT91C_HSMC4_HOSTCS_2

#define AT91C_HSMC4_HOSTCS_3

#define AT91C_HSMC4_HOSTCS_4

#define AT91C_HSMC4_HOSTCS_5

#define AT91C_HSMC4_HOSTCS_6

#define AT91C_HSMC4_HOSTCS_7

#define AT91C_HSMC4_XFRDONE

#define AT91C_HSMC4_CMDDONE

#define AT91C_HSMC4_ECCRDY

#define AT91C_HSMC4_DTOE

#define AT91C_HSMC4_UNDEF

#define AT91C_HSMC4_AWB

#define AT91C_HSMC4_HASE

#define AT91C_HSMC4_RBEDGE0

#define AT91C_HSMC4_RBEDGE1

#define AT91C_HSMC4_RBEDGE2

#define AT91C_HSMC4_RBEDGE3

#define AT91C_HSMC4_RBEDGE4

#define AT91C_HSMC4_RBEDGE5

#define AT91C_HSMC4_RBEDGE6

#define AT91C_HSMC4_RBEDGE7

#define AT91C_HSMC4_ADDRCYCLE0

#define AT91C_BANK

#define AT91C_BANK_0 0x0

#define AT91C_BANK_1 0x1

#define AT91C_BANK_2 0x2

#define AT91C_BANK_3 0x3

#define AT91C_BANK_4 0x4

#define AT91C_BANK_5 0x5

#define AT91C_BANK_6 0x6

#define AT91C_BANK_7 0x7

#define AT91C_HSMC4_ECCRESET

#define AT91C_ECC_PAGE_SIZE

#define AT91C_ECC_TYPCORRECT

#define AT91C_ECC_TYPCORRECT_ONE_PER_PAGE

#define AT91C_ECC_TYPCORRECT_ONE_EVERY_256_BYTES

#define AT91C_ECC_TYPCORRECT_ONE_EVERY_512_BYTES

#define AT91C_HSMC4_ECC_RECERR0

#define AT91C_HSMC4_ECC_ECCERR0

#define AT91C_HSMC4_ECC_MULERR0

#define AT91C_HSMC4_ECC_RECERR1

#define AT91C_HSMC4_ECC_ECCERR1

#define AT91C_HSMC4_ECC_MULERR1

#define AT91C_HSMC4_ECC_RECERR2

#define AT91C_HSMC4_ECC_ECCERR2

#define AT91C_HSMC4_ECC_MULERR2

#define AT91C_HSMC4_ECC_RECERR3

#define AT91C_HSMC4_ECC_ECCERR3

#define AT91C_HSMC4_ECC_MULERR3

#define AT91C_HSMC4_ECC_RECERR4

#define AT91C_HSMC4_ECC_ECCERR4

#define AT91C_HSMC4_ECC_MULERR4

#define AT91C_HSMC4_ECC_RECERR5

#define AT91C_HSMC4_ECC_ECCERR5

#define AT91C_HSMC4_ECC_MULERR5

#define AT91C_HSMC4_ECC_RECERR6

#define AT91C_HSMC4_ECC_ECCERR6

#define AT91C_HSMC4_ECC_MULERR6

#define AT91C_HSMC4_ECC_RECERR7

#define AT91C_HSMC4_ECC_ECCERR7

#define AT91C_HSMC4_ECC_MULERR7

#define AT91C_HSMC4_ECC_BITADDR

#define AT91C_HSMC4_ECC_WORDADDR

#define AT91C_HSMC4_ECC_NPARITY

#define AT91C_HSMC4_ECC_RECERR8

#define AT91C_HSMC4_ECC_ECCERR8

#define AT91C_HSMC4_ECC_MULERR8

#define AT91C_HSMC4_ECC_RECERR9

#define AT91C_HSMC4_ECC_ECCERR9

#define AT91C_HSMC4_ECC_MULERR9

#define AT91C_HSMC4_ECC_RECERR10

#define AT91C_HSMC4_ECC_ECCERR10

#define AT91C_HSMC4_ECC_MULERR10

#define AT91C_HSMC4_ECC_RECERR11

#define AT91C_HSMC4_ECC_ECCERR11

#define AT91C_HSMC4_ECC_MULERR11

#define AT91C_HSMC4_ECC_RECERR12

#define AT91C_HSMC4_ECC_ECCERR12

#define AT91C_HSMC4_ECC_MULERR12

#define AT91C_HSMC4_ECC_RECERR13

#define AT91C_HSMC4_ECC_ECCERR13

#define AT91C_HSMC4_ECC_MULERR13

#define AT91C_HSMC4_ECC_RECERR14

#define AT91C_HSMC4_ECC_ECCERR14

#define AT91C_HSMC4_ECC_MULERR14

#define AT91C_HSMC4_ECC_RECERR15

#define AT91C_HSMC4_ECC_ECCERR15

#define AT91C_HSMC4_ECC_MULERR15

#define AT91C_HSMC4_OCMS_SRSE

#define AT91C_HSMC4_OCMS_SMSE

#define AT91C_HSMC4_OCMS_KEY1

#define AT91C_HSMC4_OCMS_KEY2

#define AT91C_HSMC4_WP_EN

#define AT91C_HSMC4_WP_KEY

#define AT91C_HSMC4_WP_VS

#define AT91C_HSMC4_WP_VS_WP_VS0 0x0

#define AT91C_HSMC4_WP_VS_WP_VS1 0x1

#define AT91C_HSMC4_WP_VS_WP_VS2 0x2

#define AT91C_HSMC4_WP_VS_WP_VS3 0x3

#define AT91C_

#define AT91C_HSMC4_CMD1

#define AT91C_HSMC4_CMD2

#define AT91C_HSMC4_VCMD2

#define AT91C_HSMC4_ACYCLE

#define AT91C_HSMC4_ACYCLE_HSMC4_ACYCLE_NONE

#define AT91C_HSMC4_ACYCLE_HSMC4_ACYCLE_ONE

#define AT91C_HSMC4_ACYCLE_HSMC4_ACYCLE_TWO

#define AT91C_HSMC4_ACYCLE_HSMC4_ACYCLE_THREE

#define AT91C_HSMC4_ACYCLE_HSMC4_ACYCLE_FOUR

#define AT91C_HSMC4_ACYCLE_HSMC4_ACYCLE_FIVE

#define AT91C_HSMC4_CSID

#define AT91C_HSMC4_CSID_0

#define AT91C_HSMC4_CSID_1

#define AT91C_HSMC4_CSID_2

#define AT91C_HSMC4_CSID_3

#define AT91C_HSMC4_CSID_4

#define AT91C_HSMC4_CSID_5

#define AT91C_HSMC4_CSID_6

#define AT91C_HSMC4_CSID_7

#define AT91C_HSMC4_HOST_EN

#define AT91C_HSMC4_HOST_WR

#define AT91C_HSMC4_HOSTCMD

#define AT91C_MATRIX_ULBT

#define AT91C_MATRIX_ULBT_INFINIT_LENGTH 0x0

#define AT91C_MATRIX_ULBT_SINGLE_ACCESS 0x1

#define AT91C_MATRIX_ULBT_4_BEAT 0x2

#define AT91C_MATRIX_ULBT_8_BEAT 0x3

#define AT91C_MATRIX_ULBT_16_BEAT 0x4

#define AT91C_MATRIX_ULBT_32_BEAT 0x5

#define AT91C_MATRIX_ULBT_64_BEAT 0x6

#define AT91C_MATRIX_ULBT_128_BEAT 0x7

#define AT91C_MATRIX_SLOT_CYCLE

#define AT91C_MATRIX_DEFMSTR_TYPE

#define AT91C_MATRIX_DEFMSTR_TYPE_NO_DEFMSTR

#define AT91C_MATRIX_DEFMSTR_TYPE_LAST_DEFMSTR

#define AT91C_MATRIX_DEFMSTR_TYPE_FIXED_DEFMSTR

#define AT91C_MATRIX_FIXED_DEFMSTR_SCFG0

#define AT91C_MATRIX_FIXED_DEFMSTR_SCFG0_ARMS

#define AT91C_MATRIX_FIXED_DEFMSTR_SCFG1

#define AT91C_MATRIX_FIXED_DEFMSTR_SCFG1_ARMS

#define AT91C_MATRIX_FIXED_DEFMSTR_SCFG2

#define AT91C_MATRIX_FIXED_DEFMSTR_SCFG2_ARMS

#define AT91C_MATRIX_FIXED_DEFMSTR_SCFG3

#define AT91C_MATRIX_FIXED_DEFMSTR_SCFG3_ARMC

#define AT91C_MATRIX_FIXED_DEFMSTR_SCFG4

#define AT91C_MATRIX_FIXED_DEFMSTR_SCFG4_ARMC

#define AT91C_MATRIX_FIXED_DEFMSTR_SCFG5

#define AT91C_MATRIX_FIXED_DEFMSTR_SCFG5_ARMS

#define AT91C_MATRIX_FIXED_DEFMSTR_SCFG6

#define AT91C_MATRIX_FIXED_DEFMSTR_SCFG6_ARMS

#define AT91C_MATRIX_FIXED_DEFMSTR_SCFG7

#define AT91C_MATRIX_FIXED_DEFMSTR_SCFG7_ARMS

#define AT91C_MATRIX_FIXED_DEFMSTR_SCFG8

#define AT91C_MATRIX_FIXED_DEFMSTR_SCFG8_ARMS

#define AT91C_MATRIX_FIXED_DEFMSTR_SCFG8_HDMA

#define AT91C_MATRIX_FIXED_DEFMSTR_SCFG9

#define AT91C_MATRIX_FIXED_DEFMSTR_SCFG9_ARMS

#define AT91C_MATRIX_FIXED_DEFMSTR_SCFG9_HDMA

#define AT91C_HMATRIX2_VER

#define AT91C_NVIC_INTLINESNUM

#define AT91C_NVIC_INTLINESNUM_32 0x0

#define AT91C_NVIC_INTLINESNUM_64 0x1

#define AT91C_NVIC_INTLINESNUM_96 0x2

#define AT91C_NVIC_INTLINESNUM_128 0x3

#define AT91C_NVIC_INTLINESNUM_160 0x4

#define AT91C_NVIC_INTLINESNUM_192 0x5

#define AT91C_NVIC_INTLINESNUM_224 0x6

#define AT91C_NVIC_INTLINESNUM_256 0x7

#define AT91C_NVIC_INTLINESNUM_288 0x8

#define AT91C_NVIC_INTLINESNUM_320 0x9

#define AT91C_NVIC_INTLINESNUM_352 0xA

#define AT91C_NVIC_INTLINESNUM_384 0xB

#define AT91C_NVIC_INTLINESNUM_416 0xC

#define AT91C_NVIC_INTLINESNUM_448 0xD

#define AT91C_NVIC_INTLINESNUM_480 0xE

#define AT91C_NVIC_INTLINESNUM_496 0xF

#define AT91C_NVIC_STICKENABLE

#define AT91C_NVIC_STICKINT

#define AT91C_NVIC_STICKCLKSOURCE

#define AT91C_NVIC_STICKCOUNTFLAG

#define AT91C_NVIC_STICKRELOAD

#define AT91C_NVIC_STICKCURRENT

#define AT91C_NVIC_STICKTENMS

#define AT91C_NVIC_STICKSKEW

#define AT91C_NVIC_STICKNOREF

#define AT91C_NVIC_PRI_N

#define AT91C_NVIC_PRI_N1

#define AT91C_NVIC_PRI_N2

#define AT91C_NVIC_PRI_N3

#define AT91C_NVIC_REVISION

#define AT91C_NVIC_PARTNO

#define AT91C_NVIC_CONSTANT

#define AT91C_NVIC_VARIANT

#define AT91C_NVIC_IMPLEMENTER

#define AT91C_NVIC_VECTACTIVE

#define AT91C_NVIC_RETTOBASE

#define AT91C_NVIC_VECTPENDING

#define AT91C_NVIC_ISRPENDING

#define AT91C_NVIC_ISRPREEMPT

#define AT91C_NVIC_PENDSTCLR

#define AT91C_NVIC_PENDSTSET

#define AT91C_NVIC_PENDSVCLR

#define AT91C_NVIC_PENDSVSET

#define AT91C_NVIC_NMIPENDSET

#define AT91C_NVIC_TBLOFF

#define AT91C_NVIC_TBLBASE

#define AT91C_NVIC_TBLBASE_CODE

#define AT91C_NVIC_TBLBASE_RAM

#define AT91C_NVIC_VECTRESET

#define AT91C_NVIC_VECTCLRACTIVE

#define AT91C_NVIC_SYSRESETREQ

#define AT91C_NVIC_PRIGROUP

#define AT91C_NVIC_PRIGROUP_0

#define AT91C_NVIC_PRIGROUP_1

#define AT91C_NVIC_PRIGROUP_2

#define AT91C_NVIC_PRIGROUP_3

#define AT91C_NVIC_PRIGROUP_4

#define AT91C_NVIC_PRIGROUP_5

#define AT91C_NVIC_PRIGROUP_6

#define AT91C_NVIC_PRIGROUP_7

#define AT91C_NVIC_ENDIANESS

#define AT91C_NVIC_VECTKEY

#define AT91C_NVIC_SLEEPONEXIT

#define AT91C_NVIC_SLEEPDEEP

#define AT91C_NVIC_SEVONPEND

#define AT91C_NVIC_NONEBASETHRDENA

#define AT91C_NVIC_USERSETMPEND

#define AT91C_NVIC_UNALIGN_TRP

#define AT91C_NVIC_DIV_0_TRP

#define AT91C_NVIC_BFHFNMIGN

#define AT91C_NVIC_STKALIGN

#define AT91C_NVIC_PRI_4

#define AT91C_NVIC_PRI_5

#define AT91C_NVIC_PRI_6

#define AT91C_NVIC_PRI_7

#define AT91C_NVIC_PRI_8

#define AT91C_NVIC_PRI_9

#define AT91C_NVIC_PRI_10

#define AT91C_NVIC_PRI_11

#define AT91C_NVIC_PRI_12

#define AT91C_NVIC_PRI_13

#define AT91C_NVIC_PRI_14

#define AT91C_NVIC_PRI_15

#define AT91C_NVIC_MEMFAULTACT

#define AT91C_NVIC_BUSFAULTACT

#define AT91C_NVIC_USGFAULTACT

#define AT91C_NVIC_SVCALLACT

#define AT91C_NVIC_MONITORACT

#define AT91C_NVIC_PENDSVACT

#define AT91C_NVIC_SYSTICKACT

#define AT91C_NVIC_USGFAULTPENDED

#define AT91C_NVIC_MEMFAULTPENDED

#define AT91C_NVIC_BUSFAULTPENDED

#define AT91C_NVIC_SVCALLPENDED

#define AT91C_NVIC_MEMFAULTENA

#define AT91C_NVIC_BUSFAULTENA

#define AT91C_NVIC_USGFAULTENA

#define AT91C_NVIC_MEMMANAGE

#define AT91C_NVIC_BUSFAULT

#define AT91C_NVIC_USAGEFAULT

#define AT91C_NVIC_IBUSERR

#define AT91C_NVIC_PRECISERR

#define AT91C_NVIC_IMPRECISERR

#define AT91C_NVIC_UNSTKERR

#define AT91C_NVIC_STKERR

#define AT91C_NVIC_BFARVALID

#define AT91C_NVIC_ID_PFR0_0

#define AT91C_NVIC_ID_PRF0_1

#define AT91C_NVIC_ID_PRF1_MODEL

#define AT91C_NVIC_ID_DFR0_MODEL

#define AT91C_NVIC_ID_MMFR0_PMSA

#define AT91C_NVIC_ID_MMFR0_CACHE

#define AT91C_MPU_SEPARATE

#define AT91C_MPU_DREGION

#define AT91C_MPU_IREGION

#define AT91C_MPU_ENABLE

#define AT91C_MPU_HFNMIENA

#define AT91C_MPU_PRIVDEFENA

#define AT91C_MPU_REGION

#define AT91C_MPU_REG

#define AT91C_MPU_VALID

#define AT91C_MPU_ADDR

#define AT91C_MPU_ENA

#define AT91C_MPU_SIZE

#define AT91C_MPU_SRD

#define AT91C_MPU_B

#define AT91C_MPU_C

#define AT91C_MPU_S

#define AT91C_MPU_TEX

#define AT91C_MPU_AP

#define AT91C_MPU_XN

#define AT91C_CM3_SYSRESETREQ

#define AT91C_CM3_SLEEPONEXIT

#define AT91C_CM3_SLEEPDEEP

#define AT91C_CM3_SEVONPEND

#define AT91C_CM3_SYSTICKACT

#define AT91C_PDC_RXTEN

#define AT91C_PDC_RXTDIS

#define AT91C_PDC_TXTEN

#define AT91C_PDC_TXTDIS

#define AT91C_DBGU_RSTRX

#define AT91C_DBGU_RSTTX

#define AT91C_DBGU_RXEN

#define AT91C_DBGU_RXDIS

#define AT91C_DBGU_TXEN

#define AT91C_DBGU_TXDIS

#define AT91C_DBGU_RSTSTA

#define AT91C_DBGU_PAR

#define AT91C_DBGU_PAR_EVEN

#define AT91C_DBGU_PAR_ODD

#define AT91C_DBGU_PAR_SPACE

#define AT91C_DBGU_PAR_MARK

#define AT91C_DBGU_PAR_NONE

#define AT91C_DBGU_CHMODE

#define AT91C_DBGU_CHMODE_NORMAL

#define AT91C_DBGU_CHMODE_AUTO

#define AT91C_DBGU_CHMODE_LOCAL

#define AT91C_DBGU_CHMODE_REMOTE

#define AT91C_DBGU_RXRDY

#define AT91C_DBGU_TXRDY

#define AT91C_DBGU_ENDRX

#define AT91C_DBGU_ENDTX

#define AT91C_DBGU_OVRE

#define AT91C_DBGU_FRAME

#define AT91C_DBGU_PARE

#define AT91C_DBGU_TXEMPTY

#define AT91C_DBGU_TXBUFE

#define AT91C_DBGU_RXBUFF

#define AT91C_DBGU_COMM_TX

#define AT91C_DBGU_COMM_RX

#define AT91C_DBGU_FORCE_NTRST

#define AT91C_PIO_KCE

#define AT91C_PIO_NBR

#define AT91C_PIO_NBC

#define AT91C_PIO_DBC

#define AT91C_PIO_KPR

#define AT91C_PIO_KRL

#define AT91C_PIO_NBKPR

#define AT91C_PIO_NBKRL

#define AT91C_KEY0ROW

#define AT91C_KEY0COL

#define AT91C_KEY1ROW

#define AT91C_KEY1COL

#define AT91C_KEY2ROW

#define AT91C_KEY2COL

#define AT91C_KEY3ROW

#define AT91C_KEY3COL

#define AT91C_PMC_PCK

#define AT91C_PMC_PCK0

#define AT91C_PMC_PCK1

#define AT91C_PMC_PCK2

#define AT91C_CKGR_UPLLEN

#define AT91C_CKGR_UPLLEN_DISABLED

#define AT91C_CKGR_UPLLEN_ENABLED

#define AT91C_CKGR_UPLLCOUNT

#define AT91C_CKGR_BIASEN

#define AT91C_CKGR_BIASEN_DISABLED

#define AT91C_CKGR_BIASEN_ENABLED

#define AT91C_CKGR_BIASCOUNT

#define AT91C_CKGR_MOSCXTEN

#define AT91C_CKGR_MOSCXTBY

#define AT91C_CKGR_WAITMODE

#define AT91C_CKGR_MOSCRCEN

#define AT91C_CKGR_MOSCRCF

#define AT91C_CKGR_MOSCXTST

#define AT91C_CKGR_KEY

#define AT91C_CKGR_MOSCSEL

#define AT91C_CKGR_CFDEN

#define AT91C_CKGR_MAINF

#define AT91C_CKGR_MAINRDY

#define AT91C_CKGR_DIVA

#define AT91C_CKGR_DIVA_0 0x0

#define AT91C_CKGR_DIVA_BYPASS 0x1

#define AT91C_CKGR_PLLACOUNT

#define AT91C_CKGR_STMODE

#define AT91C_CKGR_STMODE_0

#define AT91C_CKGR_STMODE_1

#define AT91C_CKGR_STMODE_2

#define AT91C_CKGR_STMODE_3

#define AT91C_CKGR_MULA

#define AT91C_CKGR_SRC

#define AT91C_PMC_CSS

#define AT91C_PMC_CSS_SLOW_CLK 0x0

#define AT91C_PMC_CSS_MAIN_CLK 0x1

#define AT91C_PMC_CSS_PLLA_CLK 0x2

#define AT91C_PMC_CSS_UPLL_CLK 0x3

#define AT91C_PMC_CSS_SYS_CLK 0x4

#define AT91C_PMC_PRES

#define AT91C_PMC_PRES_CLK

#define AT91C_PMC_PRES_CLK_2

#define AT91C_PMC_PRES_CLK_4

#define AT91C_PMC_PRES_CLK_8

#define AT91C_PMC_PRES_CLK_16

#define AT91C_PMC_PRES_CLK_32

#define AT91C_PMC_PRES_CLK_64

#define AT91C_PMC_PRES_CLK_6

#define AT91C_PMC_MOSCXTS

#define AT91C_PMC_LOCKA

#define AT91C_PMC_MCKRDY

#define AT91C_PMC_LOCKU

#define AT91C_PMC_PCKRDY0

#define AT91C_PMC_PCKRDY1

#define AT91C_PMC_PCKRDY2

#define AT91C_PMC_MOSCSELS

#define AT91C_PMC_MOSCRCS

#define AT91C_PMC_CFDEV

#define AT91C_PMC_OSCSELS

#define AT91C_PMC_CFDS

#define AT91C_PMC_FOS

#define AT91C_PMC_FSTT

#define AT91C_PMC_RTTAL

#define AT91C_PMC_RTCAL

#define AT91C_PMC_USBAL

#define AT91C_PMC_LPM

#define AT91C_PMC_FSTP

#define AT91C_PMC_FOCLR

#define AT91C_RSTC_PROCRST

#define AT91C_RSTC_ICERST

#define AT91C_RSTC_PERRST

#define AT91C_RSTC_EXTRST

#define AT91C_RSTC_KEY

#define AT91C_RSTC_URSTS

#define AT91C_RSTC_RSTTYP

#define AT91C_RSTC_RSTTYP_GENERAL

#define AT91C_RSTC_RSTTYP_WAKEUP

#define AT91C_RSTC_RSTTYP_WATCHDOG

#define AT91C_RSTC_RSTTYP_SOFTWARE

#define AT91C_RSTC_RSTTYP_USER

#define AT91C_RSTC_NRSTL

#define AT91C_RSTC_SRCMP

#define AT91C_RSTC_URSTEN

#define AT91C_RSTC_URSTIEN

#define AT91C_RSTC_ERSTL

#define AT91C_SUPC_CR_VROFF

#define AT91C_SUPC_CR_VROFF_NO_EFFECT

#define AT91C_SUPC_CR_VROFF_STOP_VREG

#define AT91C_SUPC_CR_XTALSEL

#define AT91C_SUPC_CR_XTALSEL_NO_EFFECT

#define AT91C_SUPC_CR_XTALSEL_CRYSTAL_SEL

#define AT91C_SUPC_CR_KEY

#define AT91C_SUPC_SMMR_SMTH

#define AT91C_SUPC_SMMR_SMTH_1_9V

#define AT91C_SUPC_SMMR_SMTH_2_0V

#define AT91C_SUPC_SMMR_SMTH_2_1V

#define AT91C_SUPC_SMMR_SMTH_2_2V

#define AT91C_SUPC_SMMR_SMTH_2_3V

#define AT91C_SUPC_SMMR_SMTH_2_4V

#define AT91C_SUPC_SMMR_SMTH_2_5V

#define AT91C_SUPC_SMMR_SMTH_2_6V

#define AT91C_SUPC_SMMR_SMTH_2_7V

#define AT91C_SUPC_SMMR_SMTH_2_8V

#define AT91C_SUPC_SMMR_SMTH_2_9V

#define AT91C_SUPC_SMMR_SMTH_3_0V

#define AT91C_SUPC_SMMR_SMTH_3_1V

#define AT91C_SUPC_SMMR_SMTH_3_2V

#define AT91C_SUPC_SMMR_SMTH_3_3V

#define AT91C_SUPC_SMMR_SMTH_3_4V

#define AT91C_SUPC_SMMR_SMSMPL

#define AT91C_SUPC_SMMR_SMSMPL_SMD

#define AT91C_SUPC_SMMR_SMSMPL_CSM

#define AT91C_SUPC_SMMR_SMSMPL_32SLCK

#define AT91C_SUPC_SMMR_SMSMPL_256SLCK

#define AT91C_SUPC_SMMR_SMSMPL_2048SLCK

#define AT91C_SUPC_SMMR_SMRSTEN

#define AT91C_SUPC_SMMR_SMRSTEN_NOT_ENABLE

#define AT91C_SUPC_SMMR_SMRSTEN_ENABLE

#define AT91C_SUPC_SMMR_SMIEN

#define AT91C_SUPC_SMMR_SMIEN_NOT_ENABLE

#define AT91C_SUPC_SMMR_SMIEN_ENABLE

#define AT91C_SUPC_MR_BODRSTEN

#define AT91C_SUPC_MR_BODRSTEN_NOT_ENABLE

#define AT91C_SUPC_MR_BODRSTEN_ENABLE

#define AT91C_SUPC_MR_BODDIS

#define AT91C_SUPC_MR_BODDIS_ENABLE

#define AT91C_SUPC_MR_BODDIS_DISABLE

#define AT91C_SUPC_MR_VDDIORDY

#define AT91C_SUPC_MR_VDDIORDY_VDDIO_REMOVED

#define AT91C_SUPC_MR_VDDIORDY_VDDIO_PRESENT

#define AT91C_SUPC_MR_OSCBYPASS

#define AT91C_SUPC_MR_OSCBYPASS_NO_EFFECT

#define AT91C_SUPC_MR_OSCBYPASS_BYPASS

#define AT91C_SUPC_MR_KEY

#define AT91C_SUPC_WUMR_FWUPEN

#define AT91C_SUPC_WUMR_FWUPEN_NOT_ENABLE

#define AT91C_SUPC_WUMR_FWUPEN_ENABLE

#define AT91C_SUPC_WUMR_SMEN

#define AT91C_SUPC_WUMR_SMEN_NOT_ENABLE

#define AT91C_SUPC_WUMR_SMEN_ENABLE

#define AT91C_SUPC_WUMR_RTTEN

#define AT91C_SUPC_WUMR_RTTEN_NOT_ENABLE

#define AT91C_SUPC_WUMR_RTTEN_ENABLE

#define AT91C_SUPC_WUMR_RTCEN

#define AT91C_SUPC_WUMR_RTCEN_NOT_ENABLE

#define AT91C_SUPC_WUMR_RTCEN_ENABLE

#define AT91C_SUPC_WUMR_FWUPDBC

#define AT91C_SUPC_WUMR_FWUPDBC_1SCLK

#define AT91C_SUPC_WUMR_FWUPDBC_3SCLK

#define AT91C_SUPC_WUMR_FWUPDBC_32SCLK

#define AT91C_SUPC_WUMR_FWUPDBC_512SCLK

#define AT91C_SUPC_WUMR_FWUPDBC_4096SCLK

#define AT91C_SUPC_WUMR_FWUPDBC_32768SCLK

#define AT91C_SUPC_WUMR_WKUPDBC

#define AT91C_SUPC_WUMR_WKUPDBC_1SCLK

#define AT91C_SUPC_WUMR_WKUPDBC_3SCLK

#define AT91C_SUPC_WUMR_WKUPDBC_32SCLK

#define AT91C_SUPC_WUMR_WKUPDBC_512SCLK

#define AT91C_SUPC_WUMR_WKUPDBC_4096SCLK

#define AT91C_SUPC_WUMR_WKUPDBC_32768SCLK

#define AT91C_SUPC_WUIR_WKUPEN0

#define AT91C_SUPC_WUIR_WKUPEN0_NOT_ENABLE

#define AT91C_SUPC_WUIR_WKUPEN0_ENABLE

#define AT91C_SUPC_WUIR_WKUPEN1

#define AT91C_SUPC_WUIR_WKUPEN1_NOT_ENABLE

#define AT91C_SUPC_WUIR_WKUPEN1_ENABLE

#define AT91C_SUPC_WUIR_WKUPEN2

#define AT91C_SUPC_WUIR_WKUPEN2_NOT_ENABLE

#define AT91C_SUPC_WUIR_WKUPEN2_ENABLE

#define AT91C_SUPC_WUIR_WKUPEN3

#define AT91C_SUPC_WUIR_WKUPEN3_NOT_ENABLE

#define AT91C_SUPC_WUIR_WKUPEN3_ENABLE

#define AT91C_SUPC_WUIR_WKUPEN4

#define AT91C_SUPC_WUIR_WKUPEN4_NOT_ENABLE

#define AT91C_SUPC_WUIR_WKUPEN4_ENABLE

#define AT91C_SUPC_WUIR_WKUPEN5

#define AT91C_SUPC_WUIR_WKUPEN5_NOT_ENABLE

#define AT91C_SUPC_WUIR_WKUPEN5_ENABLE

#define AT91C_SUPC_WUIR_WKUPEN6

#define AT91C_SUPC_WUIR_WKUPEN6_NOT_ENABLE

#define AT91C_SUPC_WUIR_WKUPEN6_ENABLE

#define AT91C_SUPC_WUIR_WKUPEN7

#define AT91C_SUPC_WUIR_WKUPEN7_NOT_ENABLE

#define AT91C_SUPC_WUIR_WKUPEN7_ENABLE

#define AT91C_SUPC_WUIR_WKUPEN8

#define AT91C_SUPC_WUIR_WKUPEN8_NOT_ENABLE

#define AT91C_SUPC_WUIR_WKUPEN8_ENABLE

#define AT91C_SUPC_WUIR_WKUPEN9

#define AT91C_SUPC_WUIR_WKUPEN9_NOT_ENABLE

#define AT91C_SUPC_WUIR_WKUPEN9_ENABLE

#define AT91C_SUPC_WUIR_WKUPEN10

#define AT91C_SUPC_WUIR_WKUPEN10_NOT_ENABLE

#define AT91C_SUPC_WUIR_WKUPEN10_ENABLE

#define AT91C_SUPC_WUIR_WKUPEN11

#define AT91C_SUPC_WUIR_WKUPEN11_NOT_ENABLE

#define AT91C_SUPC_WUIR_WKUPEN11_ENABLE

#define AT91C_SUPC_WUIR_WKUPEN12

#define AT91C_SUPC_WUIR_WKUPEN12_NOT_ENABLE

#define AT91C_SUPC_WUIR_WKUPEN12_ENABLE

#define AT91C_SUPC_WUIR_WKUPEN13

#define AT91C_SUPC_WUIR_WKUPEN13_NOT_ENABLE

#define AT91C_SUPC_WUIR_WKUPEN13_ENABLE

#define AT91C_SUPC_WUIR_WKUPEN14

#define AT91C_SUPC_WUIR_WKUPEN14_NOT_ENABLE

#define AT91C_SUPC_WUIR_WKUPEN14_ENABLE

#define AT91C_SUPC_WUIR_WKUPEN15

#define AT91C_SUPC_WUIR_WKUPEN15_NOT_ENABLE

#define AT91C_SUPC_WUIR_WKUPEN15_ENABLE

#define AT91C_SUPC_WUIR_WKUPT0

#define AT91C_SUPC_WUIR_WKUPT0_HIGH_TO_LOW

#define AT91C_SUPC_WUIR_WKUPT0_LOW_TO_HIGH

#define AT91C_SUPC_WUIR_WKUPT1

#define AT91C_SUPC_WUIR_WKUPT1_HIGH_TO_LOW

#define AT91C_SUPC_WUIR_WKUPT1_LOW_TO_HIGH

#define AT91C_SUPC_WUIR_WKUPT2

#define AT91C_SUPC_WUIR_WKUPT2_HIGH_TO_LOW

#define AT91C_SUPC_WUIR_WKUPT2_LOW_TO_HIGH

#define AT91C_SUPC_WUIR_WKUPT3

#define AT91C_SUPC_WUIR_WKUPT3_HIGH_TO_LOW

#define AT91C_SUPC_WUIR_WKUPT3_LOW_TO_HIGH

#define AT91C_SUPC_WUIR_WKUPT4

#define AT91C_SUPC_WUIR_WKUPT4_HIGH_TO_LOW

#define AT91C_SUPC_WUIR_WKUPT4_LOW_TO_HIGH

#define AT91C_SUPC_WUIR_WKUPT5

#define AT91C_SUPC_WUIR_WKUPT5_HIGH_TO_LOW

#define AT91C_SUPC_WUIR_WKUPT5_LOW_TO_HIGH

#define AT91C_SUPC_WUIR_WKUPT6

#define AT91C_SUPC_WUIR_WKUPT6_HIGH_TO_LOW

#define AT91C_SUPC_WUIR_WKUPT6_LOW_TO_HIGH

#define AT91C_SUPC_WUIR_WKUPT7

#define AT91C_SUPC_WUIR_WKUPT7_HIGH_TO_LOW

#define AT91C_SUPC_WUIR_WKUPT7_LOW_TO_HIGH

#define AT91C_SUPC_WUIR_WKUPT8

#define AT91C_SUPC_WUIR_WKUPT8_HIGH_TO_LOW

#define AT91C_SUPC_WUIR_WKUPT8_LOW_TO_HIGH

#define AT91C_SUPC_WUIR_WKUPT9

#define AT91C_SUPC_WUIR_WKUPT9_HIGH_TO_LOW

#define AT91C_SUPC_WUIR_WKUPT9_LOW_TO_HIGH

#define AT91C_SUPC_WUIR_WKUPT10

#define AT91C_SUPC_WUIR_WKUPT10_HIGH_TO_LOW

#define AT91C_SUPC_WUIR_WKUPT10_LOW_TO_HIGH

#define AT91C_SUPC_WUIR_WKUPT11

#define AT91C_SUPC_WUIR_WKUPT11_HIGH_TO_LOW

#define AT91C_SUPC_WUIR_WKUPT11_LOW_TO_HIGH

#define AT91C_SUPC_WUIR_WKUPT12

#define AT91C_SUPC_WUIR_WKUPT12_HIGH_TO_LOW

#define AT91C_SUPC_WUIR_WKUPT12_LOW_TO_HIGH

#define AT91C_SUPC_WUIR_WKUPT13

#define AT91C_SUPC_WUIR_WKUPT13_HIGH_TO_LOW

#define AT91C_SUPC_WUIR_WKUPT13_LOW_TO_HIGH

#define AT91C_SUPC_WUIR_WKUPT14

#define AT91C_SUPC_WUIR_WKUPT14_HIGH_TO_LOW

#define AT91C_SUPC_WUIR_WKUPT14_LOW_TO_HIGH

#define AT91C_SUPC_WUIR_WKUPT15

#define AT91C_SUPC_WUIR_WKUPT15_HIGH_TO_LOW

#define AT91C_SUPC_WUIR_WKUPT15_LOW_TO_HIGH

#define AT91C_SUPC_SR_FWUPS

#define AT91C_SUPC_SR_FWUPS_NO

#define AT91C_SUPC_SR_FWUPS_PRESENT

#define AT91C_SUPC_SR_WKUPS

#define AT91C_SUPC_SR_WKUPS_NO

#define AT91C_SUPC_SR_WKUPS_PRESENT

#define AT91C_SUPC_SR_SMWS

#define AT91C_SUPC_SR_SMWS_NO

#define AT91C_SUPC_SR_SMWS_PRESENT

#define AT91C_SUPC_SR_BODRSTS

#define AT91C_SUPC_SR_BODRSTS_NO

#define AT91C_SUPC_SR_BODRSTS_PRESENT

#define AT91C_SUPC_SR_SMRSTS

#define AT91C_SUPC_SR_SMRSTS_NO

#define AT91C_SUPC_SR_SMRSTS_PRESENT

#define AT91C_SUPC_SR_SMS

#define AT91C_SUPC_SR_SMS_NO

#define AT91C_SUPC_SR_SMS_PRESENT

#define AT91C_SUPC_SR_SMOS

#define AT91C_SUPC_SR_SMOS_HIGH

#define AT91C_SUPC_SR_SMOS_LOW

#define AT91C_SUPC_SR_OSCSEL

#define AT91C_SUPC_SR_OSCSEL_RC

#define AT91C_SUPC_SR_OSCSEL_CRYST

#define AT91C_SUPC_SR_FWUPIS

#define AT91C_SUPC_SR_FWUPIS_LOW

#define AT91C_SUPC_SR_FWUPIS_HIGH

#define AT91C_SUPC_SR_WKUPIS0

#define AT91C_SUPC_SR_WKUPIS0_DIS

#define AT91C_SUPC_SR_WKUPIS0_EN

#define AT91C_SUPC_SR_WKUPIS1

#define AT91C_SUPC_SR_WKUPIS1_DIS

#define AT91C_SUPC_SR_WKUPIS1_EN

#define AT91C_SUPC_SR_WKUPIS2

#define AT91C_SUPC_SR_WKUPIS2_DIS

#define AT91C_SUPC_SR_WKUPIS2_EN

#define AT91C_SUPC_SR_WKUPIS3

#define AT91C_SUPC_SR_WKUPIS3_DIS

#define AT91C_SUPC_SR_WKUPIS3_EN

#define AT91C_SUPC_SR_WKUPIS4

#define AT91C_SUPC_SR_WKUPIS4_DIS

#define AT91C_SUPC_SR_WKUPIS4_EN

#define AT91C_SUPC_SR_WKUPIS5

#define AT91C_SUPC_SR_WKUPIS5_DIS

#define AT91C_SUPC_SR_WKUPIS5_EN

#define AT91C_SUPC_SR_WKUPIS6

#define AT91C_SUPC_SR_WKUPIS6_DIS

#define AT91C_SUPC_SR_WKUPIS6_EN

#define AT91C_SUPC_SR_WKUPIS7

#define AT91C_SUPC_SR_WKUPIS7_DIS

#define AT91C_SUPC_SR_WKUPIS7_EN

#define AT91C_SUPC_SR_WKUPIS8

#define AT91C_SUPC_SR_WKUPIS8_DIS

#define AT91C_SUPC_SR_WKUPIS8_EN

#define AT91C_SUPC_SR_WKUPIS9

#define AT91C_SUPC_SR_WKUPIS9_DIS

#define AT91C_SUPC_SR_WKUPIS9_EN

#define AT91C_SUPC_SR_WKUPIS10

#define AT91C_SUPC_SR_WKUPIS10_DIS

#define AT91C_SUPC_SR_WKUPIS10_EN

#define AT91C_SUPC_SR_WKUPIS11

#define AT91C_SUPC_SR_WKUPIS11_DIS

#define AT91C_SUPC_SR_WKUPIS11_EN

#define AT91C_SUPC_SR_WKUPIS12

#define AT91C_SUPC_SR_WKUPIS12_DIS

#define AT91C_SUPC_SR_WKUPIS12_EN

#define AT91C_SUPC_SR_WKUPIS13

#define AT91C_SUPC_SR_WKUPIS13_DIS

#define AT91C_SUPC_SR_WKUPIS13_EN

#define AT91C_SUPC_SR_WKUPIS14

#define AT91C_SUPC_SR_WKUPIS14_DIS

#define AT91C_SUPC_SR_WKUPIS14_EN

#define AT91C_SUPC_SR_WKUPIS15

#define AT91C_SUPC_SR_WKUPIS15_DIS

#define AT91C_SUPC_SR_WKUPIS15_EN

#define AT91C_RTTC_RTPRES

#define AT91C_RTTC_ALMIEN

#define AT91C_RTTC_RTTINCIEN

#define AT91C_RTTC_RTTRST

#define AT91C_RTTC_ALMV

#define AT91C_RTTC_CRTV

#define AT91C_RTTC_ALMS

#define AT91C_RTTC_RTTINC

#define AT91C_WDTC_WDRSTT

#define AT91C_WDTC_KEY

#define AT91C_WDTC_WDV

#define AT91C_WDTC_WDFIEN

#define AT91C_WDTC_WDRSTEN

#define AT91C_WDTC_WDRPROC

#define AT91C_WDTC_WDDIS

#define AT91C_WDTC_WDD

#define AT91C_WDTC_WDDBGHLT

#define AT91C_WDTC_WDIDLEHLT

#define AT91C_WDTC_WDUNF

#define AT91C_WDTC_WDERR

#define AT91C_RTC_UPDTIM

#define AT91C_RTC_UPDCAL

#define AT91C_RTC_TIMEVSEL

#define AT91C_RTC_TIMEVSEL_MINUTE

#define AT91C_RTC_TIMEVSEL_HOUR

#define AT91C_RTC_TIMEVSEL_DAY24

#define AT91C_RTC_TIMEVSEL_DAY12

#define AT91C_RTC_CALEVSEL

#define AT91C_RTC_CALEVSEL_WEEK

#define AT91C_RTC_CALEVSEL_MONTH

#define AT91C_RTC_CALEVSEL_YEAR

#define AT91C_RTC_HRMOD

#define AT91C_RTC_SEC

#define AT91C_RTC_MIN

#define AT91C_RTC_HOUR

#define AT91C_RTC_AMPM

#define AT91C_RTC_CENT

#define AT91C_RTC_YEAR

#define AT91C_RTC_MONTH

#define AT91C_RTC_DAY

#define AT91C_RTC_DATE

#define AT91C_RTC_SECEN

#define AT91C_RTC_MINEN

#define AT91C_RTC_HOUREN

#define AT91C_RTC_MONTHEN

#define AT91C_RTC_DATEEN

#define AT91C_RTC_ACKUPD

#define AT91C_RTC_ALARM

#define AT91C_RTC_SECEV

#define AT91C_RTC_TIMEV

#define AT91C_RTC_CALEV

#define AT91C_RTC_NVTIM

#define AT91C_RTC_NVCAL

#define AT91C_RTC_NVTIMALR

#define AT91C_RTC_NVCALALR

#define AT91C_ADC_SWRST

#define AT91C_ADC_START

#define AT91C_ADC_TRGEN

#define AT91C_ADC_TRGEN_DIS 0x0

#define AT91C_ADC_TRGEN_EN 0x1

#define AT91C_ADC_TRGSEL

#define AT91C_ADC_TRGSEL_EXT

#define AT91C_ADC_TRGSEL_TIOA0

#define AT91C_ADC_TRGSEL_TIOA1

#define AT91C_ADC_TRGSEL_TIOA2

#define AT91C_ADC_TRGSEL_PWM0_TRIG

#define AT91C_ADC_TRGSEL_PWM1_TRIG

#define AT91C_ADC_TRGSEL_RESERVED

#define AT91C_ADC_LOWRES

#define AT91C_ADC_LOWRES_12_BIT

#define AT91C_ADC_LOWRES_10_BIT

#define AT91C_ADC_SLEEP

#define AT91C_ADC_SLEEP_NORMAL_MODE

#define AT91C_ADC_SLEEP_MODE

#define AT91C_ADC_PRESCAL

#define AT91C_ADC_STARTUP

#define AT91C_ADC_SHTIM

#define AT91C_ADC_CH0

#define AT91C_ADC_CH1

#define AT91C_ADC_CH2

#define AT91C_ADC_CH3

#define AT91C_ADC_CH4

#define AT91C_ADC_CH5

#define AT91C_ADC_CH6

#define AT91C_ADC_CH7

#define AT91C_ADC_EOC0

#define AT91C_ADC_EOC1

#define AT91C_ADC_EOC2

#define AT91C_ADC_EOC3

#define AT91C_ADC_EOC4

#define AT91C_ADC_EOC5

#define AT91C_ADC_EOC6

#define AT91C_ADC_EOC7

#define AT91C_ADC_OVRE0

#define AT91C_ADC_OVRE1

#define AT91C_ADC_OVRE2

#define AT91C_ADC_OVRE3

#define AT91C_ADC_OVRE4

#define AT91C_ADC_OVRE5

#define AT91C_ADC_OVRE6

#define AT91C_ADC_OVRE7

#define AT91C_ADC_DRDY

#define AT91C_ADC_GOVRE

#define AT91C_ADC_ENDRX

#define AT91C_ADC_RXBUFF

#define AT91C_ADC_LDATA

#define AT91C_ADC_DATA

#define AT91C_ADC_GAIN

#define AT91C_ADC_IBCTL

#define AT91C_ADC_IBCTL_00

#define AT91C_ADC_IBCTL_01

#define AT91C_ADC_IBCTL_10

#define AT91C_ADC_IBCTL_11

#define AT91C_ADC_DIFF

#define AT91C_ADC_OFFSET

#define AT91C_OFFMODES

#define AT91C_OFF_MODE_STARTUP_TIME

#define AT91C_ADC_VER

#define AT91C_ADC12B_CR_SWRST

#define AT91C_ADC12B_CR_SWRST_NO_EFFECT

#define AT91C_ADC12B_CR_SWRST_RESET

#define AT91C_ADC12B_CR_START

#define AT91C_ADC12B_CR_START_NO_EFFECT

#define AT91C_ADC12B_CR_START_BEGIN_ADC

#define AT91C_ADC12B_MR_TRGEN

#define AT91C_ADC12B_MR_TRGEN_DIS

#define AT91C_ADC12B_MR_TRGEN_EN

#define AT91C_ADC12B_MR_TRGSEL

#define AT91C_ADC12B_MR_TRGSEL_EXT_TRIG

#define AT91C_ADC12B_MR_TRGSEL_TIOA_0

#define AT91C_ADC12B_MR_TRGSEL_TIOA_1

#define AT91C_ADC12B_MR_TRGSEL_TIOA_2

#define AT91C_ADC12B_MR_TRGSEL_TIOA_3

#define AT91C_ADC12B_MR_TRGSEL_TIOA_4

#define AT91C_ADC12B_MR_LOWRES

#define AT91C_ADC12B_MR_LOWRES_12_BIT

#define AT91C_ADC12B_MR_LOWRES_10_BIT

#define AT91C_ADC12B_MR_SLEEP

#define AT91C_ADC12B_MR_SLEEP_NORMAL

#define AT91C_ADC12B_MR_SLEEP_SLEEP

#define AT91C_ADC12B_MR_PRESCAL

#define AT91C_ADC12B_MR_STARTUP

#define AT91C_ADC12B_MR_SHTIM

#define AT91C_ADC12B_CHER_CH0

#define AT91C_ADC12B_CHER_CH0_NO_EFFECT

#define AT91C_ADC12B_CHER_CH0_ENABLE

#define AT91C_ADC12B_CHER_CH1

#define AT91C_ADC12B_CHER_CH1_NO_EFFECT

#define AT91C_ADC12B_CHER_CH1_ENABLE

#define AT91C_ADC12B_CHER_CH2

#define AT91C_ADC12B_CHER_CH2_NO_EFFECT

#define AT91C_ADC12B_CHER_CH2_ENABLE

#define AT91C_ADC12B_CHER_CH3

#define AT91C_ADC12B_CHER_CH3_NO_EFFECT

#define AT91C_ADC12B_CHER_CH3_ENABLE

#define AT91C_ADC12B_CHER_CH4

#define AT91C_ADC12B_CHER_CH4_NO_EFFECT

#define AT91C_ADC12B_CHER_CH4_ENABLE

#define AT91C_ADC12B_CHER_CH5

#define AT91C_ADC12B_CHER_CH5_NO_EFFECT

#define AT91C_ADC12B_CHER_CH5_ENABLE

#define AT91C_ADC12B_CHER_CH6

#define AT91C_ADC12B_CHER_CH6_NO_EFFECT

#define AT91C_ADC12B_CHER_CH6_ENABLE

#define AT91C_ADC12B_CHER_CH7

#define AT91C_ADC12B_CHER_CH7_NO_EFFECT

#define AT91C_ADC12B_CHER_CH7_ENABLE

#define AT91C_ADC12B_CHDR_CH0

#define AT91C_ADC12B_CHDR_CH0_NO_EFFECT

#define AT91C_ADC12B_CHDR_CH0_DISABLE

#define AT91C_ADC12B_CHDR_CH1

#define AT91C_ADC12B_CHDR_CH1_NO_EFFECT

#define AT91C_ADC12B_CHDR_CH1_DISABLE

#define AT91C_ADC12B_CHDR_CH2

#define AT91C_ADC12B_CHDR_CH2_NO_EFFECT

#define AT91C_ADC12B_CHDR_CH2_DISABLE

#define AT91C_ADC12B_CHDR_CH3

#define AT91C_ADC12B_CHDR_CH3_NO_EFFECT

#define AT91C_ADC12B_CHDR_CH3_DISABLE

#define AT91C_ADC12B_CHDR_CH4

#define AT91C_ADC12B_CHDR_CH4_NO_EFFECT

#define AT91C_ADC12B_CHDR_CH4_DISABLE

#define AT91C_ADC12B_CHDR_CH5

#define AT91C_ADC12B_CHDR_CH5_NO_EFFECT

#define AT91C_ADC12B_CHDR_CH5_DISABLE

#define AT91C_ADC12B_CHDR_CH6

#define AT91C_ADC12B_CHDR_CH6_NO_EFFECT

#define AT91C_ADC12B_CHDR_CH6_DISABLE

#define AT91C_ADC12B_CHDR_CH7

#define AT91C_ADC12B_CHDR_CH7_NO_EFFECT

#define AT91C_ADC12B_CHDR_CH7_DISABLE

#define AT91C_ADC12B_CHSR_CH0

#define AT91C_ADC12B_CHSR_CH0_DISABLED

#define AT91C_ADC12B_CHSR_CH0_ENABLED

#define AT91C_ADC12B_CHSR_CH1

#define AT91C_ADC12B_CHSR_CH1_DISABLED

#define AT91C_ADC12B_CHSR_CH1_ENABLED

#define AT91C_ADC12B_CHSR_CH2

#define AT91C_ADC12B_CHSR_CH2_DISABLED

#define AT91C_ADC12B_CHSR_CH2_ENABLED

#define AT91C_ADC12B_CHSR_CH3

#define AT91C_ADC12B_CHSR_CH3_DISABLED

#define AT91C_ADC12B_CHSR_CH3_ENABLED

#define AT91C_ADC12B_CHSR_CH4

#define AT91C_ADC12B_CHSR_CH4_DISABLED

#define AT91C_ADC12B_CHSR_CH4_ENABLED

#define AT91C_ADC12B_CHSR_CH5

#define AT91C_ADC12B_CHSR_CH5_DISABLED

#define AT91C_ADC12B_CHSR_CH5_ENABLED

#define AT91C_ADC12B_CHSR_CH6

#define AT91C_ADC12B_CHSR_CH6_DISABLED

#define AT91C_ADC12B_CHSR_CH6_ENABLED

#define AT91C_ADC12B_CHSR_CH7

#define AT91C_ADC12B_CHSR_CH7_DISABLED

#define AT91C_ADC12B_CHSR_CH7_ENABLED

#define AT91C_ADC12B_SR_EOC0

#define AT91C_ADC12B_SR_EOC0_DISABLE

#define AT91C_ADC12B_SR_EOC0_ENABLE

#define AT91C_ADC12B_SR_EOC1

#define AT91C_ADC12B_SR_EOC1_DISABLE

#define AT91C_ADC12B_SR_EOC1_ENABLE

#define AT91C_ADC12B_SR_EOC2

#define AT91C_ADC12B_SR_EOC2_DISABLE

#define AT91C_ADC12B_SR_EOC2_ENABLE

#define AT91C_ADC12B_SR_EOC3

#define AT91C_ADC12B_SR_EOC3_DISABLE

#define AT91C_ADC12B_SR_EOC3_ENABLE

#define AT91C_ADC12B_SR_EOC4

#define AT91C_ADC12B_SR_EOC4_DISABLE

#define AT91C_ADC12B_SR_EOC4_ENABLE

#define AT91C_ADC12B_SR_EOC5

#define AT91C_ADC12B_SR_EOC5_DISABLE

#define AT91C_ADC12B_SR_EOC5_ENABLE

#define AT91C_ADC12B_SR_EOC6

#define AT91C_ADC12B_SR_EOC6_DISABLE

#define AT91C_ADC12B_SR_EOC6_ENABLE

#define AT91C_ADC12B_SR_EOC7

#define AT91C_ADC12B_SR_EOC7_DISABLE

#define AT91C_ADC12B_SR_EOC7_ENABLE

#define AT91C_ADC12B_SR_OVRE0

#define AT91C_ADC12B_SR_OVRE0_NO_ERROR

#define AT91C_ADC12B_SR_OVRE0_ERROR

#define AT91C_ADC12B_SR_OVRE1

#define AT91C_ADC12B_SR_OVRE1_NO_ERROR

#define AT91C_ADC12B_SR_OVRE1_ERROR

#define AT91C_ADC12B_SR_OVRE2

#define AT91C_ADC12B_SR_OVRE2_NO_ERROR

#define AT91C_ADC12B_SR_OVRE2_ERROR

#define AT91C_ADC12B_SR_OVRE3

#define AT91C_ADC12B_SR_OVRE3_NO_ERROR

#define AT91C_ADC12B_SR_OVRE3_ERROR

#define AT91C_ADC12B_SR_OVRE4

#define AT91C_ADC12B_SR_OVRE4_NO_ERROR

#define AT91C_ADC12B_SR_OVRE4_ERROR

#define AT91C_ADC12B_SR_OVRE5

#define AT91C_ADC12B_SR_OVRE5_NO_ERROR

#define AT91C_ADC12B_SR_OVRE5_ERROR

#define AT91C_ADC12B_SR_OVRE6

#define AT91C_ADC12B_SR_OVRE6_NO_ERROR

#define AT91C_ADC12B_SR_OVRE6_ERROR

#define AT91C_ADC12B_SR_OVRE7

#define AT91C_ADC12B_SR_OVRE7_NO_ERROR

#define AT91C_ADC12B_SR_OVRE7_ERROR

#define AT91C_ADC12B_SR_DRDY

#define AT91C_ADC12B_SR_DRDY_NO_CONV

#define AT91C_ADC12B_SR_DRDY_CONV

#define AT91C_ADC12B_SR_GOVRE

#define AT91C_ADC12B_SR_GOVRE_NO_ERROR

#define AT91C_ADC12B_SR_GOVRE_ERROR

#define AT91C_ADC12B_SR_ENDRX

#define AT91C_ADC12B_SR_ENDRX_NOT_REACH

#define AT91C_ADC12B_SR_ENDRX_REACH_0

#define AT91C_ADC12B_SR_RXBUFF

#define AT91C_ADC12B_SR_RXBUFF_NO_ZERO

#define AT91C_ADC12B_SR_RXBUFF_ZERO

#define AT91C_ADC12B_LCDR_LDATA

#define AT91C_ADC12B_IER_EOC0

#define AT91C_ADC12B_IER_EOC0_NO_EFFECT

#define AT91C_ADC12B_IER_EOC0_ENABLE

#define AT91C_ADC12B_IER_EOC1

#define AT91C_ADC12B_IER_EOC1_NO_EFFECT

#define AT91C_ADC12B_IER_EOC1_ENABLE

#define AT91C_ADC12B_IER_EOC2

#define AT91C_ADC12B_IER_EOC2_NO_EFFECT

#define AT91C_ADC12B_IER_EOC2_ENABLE

#define AT91C_ADC12B_IER_EOC3

#define AT91C_ADC12B_IER_EOC3_NO_EFFECT

#define AT91C_ADC12B_IER_EOC3_ENABLE

#define AT91C_ADC12B_IER_EOC4

#define AT91C_ADC12B_IER_EOC4_NO_EFFECT

#define AT91C_ADC12B_IER_EOC4_ENABLE

#define AT91C_ADC12B_IER_EOC5

#define AT91C_ADC12B_IER_EOC5_NO_EFFECT

#define AT91C_ADC12B_IER_EOC5_ENABLE

#define AT91C_ADC12B_IER_EOC6

#define AT91C_ADC12B_IER_EOC6_NO_EFFECT

#define AT91C_ADC12B_IER_EOC6_ENABLE

#define AT91C_ADC12B_IER_EOC7

#define AT91C_ADC12B_IER_EOC7_NO_EFFECT

#define AT91C_ADC12B_IER_EOC7_ENABLE

#define AT91C_ADC12B_IER_OVRE0

#define AT91C_ADC12B_IER_OVRE0_NO_EFFECT

#define AT91C_ADC12B_IER_OVRE0_ENABLE

#define AT91C_ADC12B_IER_OVRE1

#define AT91C_ADC12B_IER_OVRE1_NO_EFFECT

#define AT91C_ADC12B_IER_OVRE1_ENABLE

#define AT91C_ADC12B_IER_OVRE2

#define AT91C_ADC12B_IER_OVRE2_NO_EFFECT

#define AT91C_ADC12B_IER_OVRE2_ENABLE

#define AT91C_ADC12B_IER_OVRE3

#define AT91C_ADC12B_IER_OVRE3_NO_EFFECT

#define AT91C_ADC12B_IER_OVRE3_ENABLE

#define AT91C_ADC12B_IER_OVRE4

#define AT91C_ADC12B_IER_OVRE4_NO_EFFECT

#define AT91C_ADC12B_IER_OVRE4_ENABLE

#define AT91C_ADC12B_IER_OVRE5

#define AT91C_ADC12B_IER_OVRE5_NO_EFFECT

#define AT91C_ADC12B_IER_OVRE5_ENABLE

#define AT91C_ADC12B_IER_OVRE6

#define AT91C_ADC12B_IER_OVRE6_NO_EFFECT

#define AT91C_ADC12B_IER_OVRE6_ENABLE

#define AT91C_ADC12B_IER_OVRE7

#define AT91C_ADC12B_IER_OVRE7_NO_EFFECT

#define AT91C_ADC12B_IER_OVRE7_ENABLE

#define AT91C_ADC12B_IER_DRDY

#define AT91C_ADC12B_IER_DRDY_NO_EFFECT

#define AT91C_ADC12B_IER_DRDY_ENABLE

#define AT91C_ADC12B_IER_GOVRE

#define AT91C_ADC12B_IER_GOVRE_NO_EFFECT

#define AT91C_ADC12B_IER_GOVRE_ENABLE

#define AT91C_ADC12B_IER_ENDRX

#define AT91C_ADC12B_IER_ENDRX_NO_EFFECT

#define AT91C_ADC12B_IER_ENDRX_ENABLE

#define AT91C_ADC12B_IER_RXBUFF

#define AT91C_ADC12B_IER_RXBUFF_NO_EFFECT

#define AT91C_ADC12B_IER_RXBUFF_ENABLE

#define AT91C_ADC12B_IDR_EOC0

#define AT91C_ADC12B_IDR_EOC0_NO_EFFECT

#define AT91C_ADC12B_IDR_EOC0_DISABLE

#define AT91C_ADC12B_IDR_EOC1

#define AT91C_ADC12B_IDR_EOC1_NO_EFFECT

#define AT91C_ADC12B_IDR_EOC1_DISABLE

#define AT91C_ADC12B_IDR_EOC2

#define AT91C_ADC12B_IDR_EOC2_NO_EFFECT

#define AT91C_ADC12B_IDR_EOC2_DISABLE

#define AT91C_ADC12B_IDR_EOC3

#define AT91C_ADC12B_IDR_EOC3_NO_EFFECT

#define AT91C_ADC12B_IDR_EOC3_DISABLE

#define AT91C_ADC12B_IDR_EOC4

#define AT91C_ADC12B_IDR_EOC4_NO_EFFECT

#define AT91C_ADC12B_IDR_EOC4_DISABLE

#define AT91C_ADC12B_IDR_EOC5

#define AT91C_ADC12B_IDR_EOC5_NO_EFFECT

#define AT91C_ADC12B_IDR_EOC5_DISABLE

#define AT91C_ADC12B_IDR_EOC6

#define AT91C_ADC12B_IDR_EOC6_NO_EFFECT

#define AT91C_ADC12B_IDR_EOC6_DISABLE

#define AT91C_ADC12B_IDR_EOC7

#define AT91C_ADC12B_IDR_EOC7_NO_EFFECT

#define AT91C_ADC12B_IDR_EOC7_DISABLE

#define AT91C_ADC12B_IDR_OVRE0

#define AT91C_ADC12B_IDR_OVRE0_NO_EFFECT

#define AT91C_ADC12B_IDR_OVRE0_DISABLE

#define AT91C_ADC12B_IDR_OVRE1

#define AT91C_ADC12B_IDR_OVRE1_NO_EFFECT

#define AT91C_ADC12B_IDR_OVRE1_DISABLE

#define AT91C_ADC12B_IDR_OVRE2

#define AT91C_ADC12B_IDR_OVRE2_NO_EFFECT

#define AT91C_ADC12B_IDR_OVRE2_DISABLE

#define AT91C_ADC12B_IDR_OVRE3

#define AT91C_ADC12B_IDR_OVRE3_NO_EFFECT

#define AT91C_ADC12B_IDR_OVRE3_DISABLE

#define AT91C_ADC12B_IDR_OVRE4

#define AT91C_ADC12B_IDR_OVRE4_NO_EFFECT

#define AT91C_ADC12B_IDR_OVRE4_DISABLE

#define AT91C_ADC12B_IDR_OVRE5

#define AT91C_ADC12B_IDR_OVRE5_NO_EFFECT

#define AT91C_ADC12B_IDR_OVRE5_DISABLE

#define AT91C_ADC12B_IDR_OVRE6

#define AT91C_ADC12B_IDR_OVRE6_NO_EFFECT

#define AT91C_ADC12B_IDR_OVRE6_DISABLE

#define AT91C_ADC12B_IDR_OVRE7

#define AT91C_ADC12B_IDR_OVRE7_NO_EFFECT

#define AT91C_ADC12B_IDR_OVRE7_DISABLE

#define AT91C_ADC12B_IDR_DRDY

#define AT91C_ADC12B_IDR_DRDY_NO_EFFECT

#define AT91C_ADC12B_IDR_DRDY_DISABLE

#define AT91C_ADC12B_IDR_GOVRE

#define AT91C_ADC12B_IDR_GOVRE_NO_EFFECT

#define AT91C_ADC12B_IDR_GOVRE_DISABLE

#define AT91C_ADC12B_IDR_ENDRX

#define AT91C_ADC12B_IDR_ENDRX_NO_EFFECT

#define AT91C_ADC12B_IDR_ENDRX_DISABLE

#define AT91C_ADC12B_IDR_RXBUFF

#define AT91C_ADC12B_IDR_RXBUFF_NO_EFFECT

#define AT91C_ADC12B_IDR_RXBUFF_DISABLE

#define AT91C_ADC12B_IMR_EOC0

#define AT91C_ADC12B_IMR_EOC0_DIS

#define AT91C_ADC12B_IMR_EOC0_EN

#define AT91C_ADC12B_IMR_EOC1

#define AT91C_ADC12B_IMR_EOC1_DIS

#define AT91C_ADC12B_IMR_EOC1_EN

#define AT91C_ADC12B_IMR_EOC2

#define AT91C_ADC12B_IMR_EOC2_DIS

#define AT91C_ADC12B_IMR_EOC2_EN

#define AT91C_ADC12B_IMR_EOC3

#define AT91C_ADC12B_IMR_EOC3_DIS

#define AT91C_ADC12B_IMR_EOC3_EN

#define AT91C_ADC12B_IMR_EOC4

#define AT91C_ADC12B_IMR_EOC4_DIS

#define AT91C_ADC12B_IMR_EOC4_EN

#define AT91C_ADC12B_IMR_EOC5

#define AT91C_ADC12B_IMR_EOC5_DIS

#define AT91C_ADC12B_IMR_EOC5_EN

#define AT91C_ADC12B_IMR_EOC6

#define AT91C_ADC12B_IMR_EOC6_DIS

#define AT91C_ADC12B_IMR_EOC6_EN

#define AT91C_ADC12B_IMR_EOC7

#define AT91C_ADC12B_IMR_EOC7_DIS

#define AT91C_ADC12B_IMR_EOC7_EN

#define AT91C_ADC12B_IMR_OVRE0

#define AT91C_ADC12B_IMR_OVRE0_DIS

#define AT91C_ADC12B_IMR_OVRE0_EN

#define AT91C_ADC12B_IMR_OVRE1

#define AT91C_ADC12B_IMR_OVRE1_DIS

#define AT91C_ADC12B_IMR_OVRE1_EN

#define AT91C_ADC12B_IMR_OVRE2

#define AT91C_ADC12B_IMR_OVRE2_DIS

#define AT91C_ADC12B_IMR_OVRE2_EN

#define AT91C_ADC12B_IMR_OVRE3

#define AT91C_ADC12B_IMR_OVRE3_DIS

#define AT91C_ADC12B_IMR_OVRE3_EN

#define AT91C_ADC12B_IMR_OVRE4

#define AT91C_ADC12B_IMR_OVRE4_DIS

#define AT91C_ADC12B_IMR_OVRE4_EN

#define AT91C_ADC12B_IMR_OVRE5

#define AT91C_ADC12B_IMR_OVRE5_DIS

#define AT91C_ADC12B_IMR_OVRE5_EN

#define AT91C_ADC12B_IMR_OVRE6

#define AT91C_ADC12B_IMR_OVRE6_DIS

#define AT91C_ADC12B_IMR_OVRE6_EN

#define AT91C_ADC12B_IMR_OVRE7

#define AT91C_ADC12B_IMR_OVRE7_DIS

#define AT91C_ADC12B_IMR_OVRE7_EN

#define AT91C_ADC12B_IMR_DRDY

#define AT91C_ADC12B_IMR_DRDY_DIS

#define AT91C_ADC12B_IMR_DRDY_EN

#define AT91C_ADC12B_IMR_GOVRE

#define AT91C_ADC12B_IMR_GOVRE_DIS

#define AT91C_ADC12B_IMR_GOVRE_EN

#define AT91C_ADC12B_IMR_ENDRX

#define AT91C_ADC12B_IMR_ENDRX_DIS

#define AT91C_ADC12B_IMR_ENDRX_EN

#define AT91C_ADC12B_IMR_RXBUFF

#define AT91C_ADC12B_IMR_RXBUFF_DIS

#define AT91C_ADC12B_IMR_RXBUFF_EN

#define AT91C_ADC12B_CDR_DATA

#define AT91C_ADC12B_ACR_GAIN

#define AT91C_ADC12B_ACR_IBCTL

#define AT91C_ADC12B_ACR_IBCTL_MIN20

#define AT91C_ADC12B_ACR_IBCTL_TYP

#define AT91C_ADC12B_ACR_IBCTL_PLUS20

#define AT91C_ADC12B_ACR_IBCTL_PLUS40

#define AT91C_ADC12B_ACR_DIFF

#define AT91C_ADC12B_ACR_DIFF_SINGLE

#define AT91C_ADC12B_ACR_DIFF_FULLY

#define AT91C_ADC12B_ACR_OFFSET

#define AT91C_ADC12B_EMR_OFFMODES

#define AT91C_ADC12B_EMR_OFFMODES_STBY

#define AT91C_ADC12B_EMR_OFFMODES_OFF

#define AT91C_ADC12B_EMR_OFF_MODE_STARTUP_TIME

#define AT91C_TC_CLKEN

#define AT91C_TC_CLKDIS

#define AT91C_TC_SWTRG

#define AT91C_TC_CLKS

#define AT91C_TC_CLKS_TIMER_DIV1_CLOCK 0x0

#define AT91C_TC_CLKS_TIMER_DIV2_CLOCK 0x1

#define AT91C_TC_CLKS_TIMER_DIV3_CLOCK 0x2

#define AT91C_TC_CLKS_TIMER_DIV4_CLOCK 0x3

#define AT91C_TC_CLKS_TIMER_DIV5_CLOCK 0x4

#define AT91C_TC_CLKS_XC0 0x5

#define AT91C_TC_CLKS_XC1 0x6

#define AT91C_TC_CLKS_XC2 0x7

#define AT91C_TC_CLKI

#define AT91C_TC_BURST

#define AT91C_TC_BURST_NONE

#define AT91C_TC_BURST_XC0

#define AT91C_TC_BURST_XC1

#define AT91C_TC_BURST_XC2

#define AT91C_TC_CPCSTOP

#define AT91C_TC_LDBSTOP

#define AT91C_TC_CPCDIS

#define AT91C_TC_LDBDIS

#define AT91C_TC_ETRGEDG

#define AT91C_TC_ETRGEDG_NONE

#define AT91C_TC_ETRGEDG_RISING

#define AT91C_TC_ETRGEDG_FALLING

#define AT91C_TC_ETRGEDG_BOTH

#define AT91C_TC_EEVTEDG

#define AT91C_TC_EEVTEDG_NONE

#define AT91C_TC_EEVTEDG_RISING

#define AT91C_TC_EEVTEDG_FALLING

#define AT91C_TC_EEVTEDG_BOTH

#define AT91C_TC_EEVT

#define AT91C_TC_EEVT_TIOB

#define AT91C_TC_EEVT_XC0

#define AT91C_TC_EEVT_XC1

#define AT91C_TC_EEVT_XC2

#define AT91C_TC_ABETRG

#define AT91C_TC_ENETRG

#define AT91C_TC_WAVESEL

#define AT91C_TC_WAVESEL_UP

#define AT91C_TC_WAVESEL_UPDOWN

#define AT91C_TC_WAVESEL_UP_AUTO

#define AT91C_TC_WAVESEL_UPDOWN_AUTO

#define AT91C_TC_CPCTRG

#define AT91C_TC_WAVE

#define AT91C_TC_ACPA

#define AT91C_TC_ACPA_NONE

#define AT91C_TC_ACPA_SET

#define AT91C_TC_ACPA_CLEAR

#define AT91C_TC_ACPA_TOGGLE

#define AT91C_TC_LDRA

#define AT91C_TC_LDRA_NONE

#define AT91C_TC_LDRA_RISING

#define AT91C_TC_LDRA_FALLING

#define AT91C_TC_LDRA_BOTH

#define AT91C_TC_ACPC

#define AT91C_TC_ACPC_NONE

#define AT91C_TC_ACPC_SET

#define AT91C_TC_ACPC_CLEAR

#define AT91C_TC_ACPC_TOGGLE

#define AT91C_TC_LDRB

#define AT91C_TC_LDRB_NONE

#define AT91C_TC_LDRB_RISING

#define AT91C_TC_LDRB_FALLING

#define AT91C_TC_LDRB_BOTH

#define AT91C_TC_AEEVT

#define AT91C_TC_AEEVT_NONE

#define AT91C_TC_AEEVT_SET

#define AT91C_TC_AEEVT_CLEAR

#define AT91C_TC_AEEVT_TOGGLE

#define AT91C_TC_ASWTRG

#define AT91C_TC_ASWTRG_NONE

#define AT91C_TC_ASWTRG_SET

#define AT91C_TC_ASWTRG_CLEAR

#define AT91C_TC_ASWTRG_TOGGLE

#define AT91C_TC_BCPB

#define AT91C_TC_BCPB_NONE

#define AT91C_TC_BCPB_SET

#define AT91C_TC_BCPB_CLEAR

#define AT91C_TC_BCPB_TOGGLE

#define AT91C_TC_BCPC

#define AT91C_TC_BCPC_NONE

#define AT91C_TC_BCPC_SET

#define AT91C_TC_BCPC_CLEAR

#define AT91C_TC_BCPC_TOGGLE

#define AT91C_TC_BEEVT

#define AT91C_TC_BEEVT_NONE

#define AT91C_TC_BEEVT_SET

#define AT91C_TC_BEEVT_CLEAR

#define AT91C_TC_BEEVT_TOGGLE

#define AT91C_TC_BSWTRG

#define AT91C_TC_BSWTRG_NONE

#define AT91C_TC_BSWTRG_SET

#define AT91C_TC_BSWTRG_CLEAR

#define AT91C_TC_BSWTRG_TOGGLE

#define AT91C_TC_COVFS

#define AT91C_TC_LOVRS

#define AT91C_TC_CPAS

#define AT91C_TC_CPBS

#define AT91C_TC_CPCS

#define AT91C_TC_LDRAS

#define AT91C_TC_LDRBS

#define AT91C_TC_ETRGS

#define AT91C_TC_CLKSTA

#define AT91C_TC_MTIOA

#define AT91C_TC_MTIOB

#define AT91C_TCB_SYNC

#define AT91C_TCB_TC0XC0S

#define AT91C_TCB_TC0XC0S_TCLK0 0x0

#define AT91C_TCB_TC0XC0S_NONE 0x1

#define AT91C_TCB_TC0XC0S_TIOA1 0x2

#define AT91C_TCB_TC0XC0S_TIOA2 0x3

#define AT91C_TCB_TC1XC1S

#define AT91C_TCB_TC1XC1S_TCLK1

#define AT91C_TCB_TC1XC1S_NONE

#define AT91C_TCB_TC1XC1S_TIOA0

#define AT91C_TCB_TC1XC1S_TIOA2

#define AT91C_TCB_TC2XC2S

#define AT91C_TCB_TC2XC2S_TCLK2

#define AT91C_TCB_TC2XC2S_NONE

#define AT91C_TCB_TC2XC2S_TIOA0

#define AT91C_TCB_TC2XC2S_TIOA1

#define AT91C_EFC_FRDY

#define AT91C_EFC_FWS

#define AT91C_EFC_FWS_0WS

#define AT91C_EFC_FWS_1WS

#define AT91C_EFC_FWS_2WS

#define AT91C_EFC_FWS_3WS

#define AT91C_EFC_FCMD

#define AT91C_EFC_FCMD_GETD 0x0

#define AT91C_EFC_FCMD_WP 0x1

#define AT91C_EFC_FCMD_WPL 0x2

#define AT91C_EFC_FCMD_EWP 0x3

#define AT91C_EFC_FCMD_EWPL 0x4

#define AT91C_EFC_FCMD_EA 0x5

#define AT91C_EFC_FCMD_EPL 0x6

#define AT91C_EFC_FCMD_EPA 0x7

#define AT91C_EFC_FCMD_SLB 0x8

#define AT91C_EFC_FCMD_CLB 0x9

#define AT91C_EFC_FCMD_GLB 0xA

#define AT91C_EFC_FCMD_SFB 0xB

#define AT91C_EFC_FCMD_CFB 0xC

#define AT91C_EFC_FCMD_GFB 0xD

#define AT91C_EFC_FCMD_STUI 0xE

#define AT91C_EFC_FCMD_SPUI 0xF

#define AT91C_EFC_FARG

#define AT91C_EFC_FKEY

#define AT91C_EFC_FRDY_S

#define AT91C_EFC_FCMDE

#define AT91C_EFC_LOCKE

#define AT91C_EFC_FVALUE

#define AT91C_MCI_MCIEN

#define AT91C_MCI_MCIEN_0 0x0

#define AT91C_MCI_MCIEN_1 0x1

#define AT91C_MCI_MCIDIS

#define AT91C_MCI_MCIDIS_0

#define AT91C_MCI_MCIDIS_1

#define AT91C_MCI_PWSEN

#define AT91C_MCI_PWSEN_0

#define AT91C_MCI_PWSEN_1

#define AT91C_MCI_PWSDIS

#define AT91C_MCI_PWSDIS_0

#define AT91C_MCI_PWSDIS_1

#define AT91C_MCI_IOWAITEN

#define AT91C_MCI_IOWAITEN_0

#define AT91C_MCI_IOWAITEN_1

#define AT91C_MCI_IOWAITDIS

#define AT91C_MCI_IOWAITDIS_0

#define AT91C_MCI_IOWAITDIS_1

#define AT91C_MCI_SWRST

#define AT91C_MCI_SWRST_0

#define AT91C_MCI_SWRST_1

#define AT91C_MCI_CLKDIV

#define AT91C_MCI_PWSDIV

#define AT91C_MCI_RDPROOF

#define AT91C_MCI_RDPROOF_DISABLE

#define AT91C_MCI_RDPROOF_ENABLE

#define AT91C_MCI_WRPROOF

#define AT91C_MCI_WRPROOF_DISABLE

#define AT91C_MCI_WRPROOF_ENABLE

#define AT91C_MCI_PDCFBYTE

#define AT91C_MCI_PDCFBYTE_DISABLE

#define AT91C_MCI_PDCFBYTE_ENABLE

#define AT91C_MCI_PDCPADV

#define AT91C_MCI_PDCMODE

#define AT91C_MCI_PDCMODE_DISABLE

#define AT91C_MCI_PDCMODE_ENABLE

#define AT91C_MCI_BLKLEN

#define AT91C_MCI_DTOCYC

#define AT91C_MCI_DTOMUL

#define AT91C_MCI_DTOMUL_1

#define AT91C_MCI_DTOMUL_16

#define AT91C_MCI_DTOMUL_128

#define AT91C_MCI_DTOMUL_256

#define AT91C_MCI_DTOMUL_1024

#define AT91C_MCI_DTOMUL_4096

#define AT91C_MCI_DTOMUL_65536

#define AT91C_MCI_DTOMUL_1048576

#define AT91C_MCI_SCDSEL

#define AT91C_MCI_SCDSEL_SLOTA 0x0

#define AT91C_MCI_SCDSEL_SLOTB 0x1

#define AT91C_MCI_SCDSEL_SLOTC 0x2

#define AT91C_MCI_SCDSEL_SLOTD 0x3

#define AT91C_MCI_SCDBUS

#define AT91C_MCI_SCDBUS_1BIT

#define AT91C_MCI_SCDBUS_4BITS

#define AT91C_MCI_SCDBUS_8BITS

#define AT91C_MCI_CMDNB

#define AT91C_MCI_RSPTYP

#define AT91C_MCI_RSPTYP_NO

#define AT91C_MCI_RSPTYP_48

#define AT91C_MCI_RSPTYP_136

#define AT91C_MCI_RSPTYP_R1B

#define AT91C_MCI_SPCMD

#define AT91C_MCI_SPCMD_NONE

#define AT91C_MCI_SPCMD_INIT

#define AT91C_MCI_SPCMD_SYNC

#define AT91C_MCI_SPCMD_CE_ATA

#define AT91C_MCI_SPCMD_IT_CMD

#define AT91C_MCI_SPCMD_IT_REP

#define AT91C_MCI_OPDCMD

#define AT91C_MCI_OPDCMD_PUSHPULL

#define AT91C_MCI_OPDCMD_OPENDRAIN

#define AT91C_MCI_MAXLAT

#define AT91C_MCI_MAXLAT_5

#define AT91C_MCI_MAXLAT_64

#define AT91C_MCI_TRCMD

#define AT91C_MCI_TRCMD_NO

#define AT91C_MCI_TRCMD_START

#define AT91C_MCI_TRCMD_STOP

#define AT91C_MCI_TRDIR

#define AT91C_MCI_TRDIR_WRITE

#define AT91C_MCI_TRDIR_READ

#define AT91C_MCI_TRTYP

#define AT91C_MCI_TRTYP_BLOCK

#define AT91C_MCI_TRTYP_MULTIPLE

#define AT91C_MCI_TRTYP_STREAM

#define AT91C_MCI_TRTYP_SDIO_BYTE

#define AT91C_MCI_TRTYP_SDIO_BLOCK

#define AT91C_MCI_IOSPCMD

#define AT91C_MCI_IOSPCMD_NONE

#define AT91C_MCI_IOSPCMD_SUSPEND

#define AT91C_MCI_IOSPCMD_RESUME

#define AT91C_MCI_ATACS

#define AT91C_MCI_ATACS_NORMAL

#define AT91C_MCI_ATACS_COMPLETION

#define AT91C_MCI_BCNT

#define AT91C_MCI_CSTOCYC

#define AT91C_MCI_CSTOMUL

#define AT91C_MCI_CSTOMUL_1

#define AT91C_MCI_CSTOMUL_16

#define AT91C_MCI_CSTOMUL_128

#define AT91C_MCI_CSTOMUL_256

#define AT91C_MCI_CSTOMUL_1024

#define AT91C_MCI_CSTOMUL_4096

#define AT91C_MCI_CSTOMUL_65536

#define AT91C_MCI_CSTOMUL_1048576

#define AT91C_MCI_CMDRDY

#define AT91C_MCI_RXRDY

#define AT91C_MCI_TXRDY

#define AT91C_MCI_BLKE

#define AT91C_MCI_DTIP

#define AT91C_MCI_NOTBUSY

#define AT91C_MCI_ENDRX

#define AT91C_MCI_ENDTX

#define AT91C_MCI_SDIOIRQA

#define AT91C_MCI_SDIOIRQB

#define AT91C_MCI_SDIOIRQC

#define AT91C_MCI_SDIOIRQD

#define AT91C_MCI_SDIOWAIT

#define AT91C_MCI_CSRCV

#define AT91C_MCI_RXBUFF

#define AT91C_MCI_TXBUFE

#define AT91C_MCI_RINDE

#define AT91C_MCI_RDIRE

#define AT91C_MCI_RCRCE

#define AT91C_MCI_RENDE

#define AT91C_MCI_RTOE

#define AT91C_MCI_DCRCE

#define AT91C_MCI_DTOE

#define AT91C_MCI_CSTOE

#define AT91C_MCI_BLKOVRE

#define AT91C_MCI_DMADONE

#define AT91C_MCI_FIFOEMPTY

#define AT91C_MCI_XFRDONE

#define AT91C_MCI_OVRE

#define AT91C_MCI_UNRE

#define AT91C_MCI_OFFSET

#define AT91C_MCI_CHKSIZE

#define AT91C_MCI_CHKSIZE_1

#define AT91C_MCI_CHKSIZE_4

#define AT91C_MCI_CHKSIZE_8

#define AT91C_MCI_CHKSIZE_16

#define AT91C_MCI_CHKSIZE_32

#define AT91C_MCI_DMAEN

#define AT91C_MCI_DMAEN_DISABLE

#define AT91C_MCI_DMAEN_ENABLE

#define AT91C_MCI_FIFOMODE

#define AT91C_MCI_FIFOMODE_AMOUNTDATA 0x0

#define AT91C_MCI_FIFOMODE_ONEDATA 0x1

#define AT91C_MCI_FERRCTRL

#define AT91C_MCI_FERRCTRL_RWCMD

#define AT91C_MCI_FERRCTRL_READSR

#define AT91C_MCI_HSMODE

#define AT91C_MCI_HSMODE_DISABLE

#define AT91C_MCI_HSMODE_ENABLE

#define AT91C_MCI_LSYNC

#define AT91C_MCI_LSYNC_CURRENT

#define AT91C_MCI_LSYNC_INFINITE

#define AT91C_MCI_WP_EN

#define AT91C_MCI_WP_EN_DISABLE 0x0

#define AT91C_MCI_WP_EN_ENABLE 0x1

#define AT91C_MCI_WP_KEY

#define AT91C_MCI_WP_VS

#define AT91C_MCI_WP_VS_NO_VIOLATION 0x0

#define AT91C_MCI_WP_VS_ON_WRITE 0x1

#define AT91C_MCI_WP_VS_ON_RESET 0x2

#define AT91C_MCI_WP_VS_ON_BOTH 0x3

#define AT91C_MCI_WP_VSRC

#define AT91C_MCI_WP_VSRC_NO_VIOLATION

#define AT91C_MCI_WP_VSRC_MCI_MR

#define AT91C_MCI_WP_VSRC_MCI_DTOR

#define AT91C_MCI_WP_VSRC_MCI_SDCR

#define AT91C_MCI_WP_VSRC_MCI_CSTOR

#define AT91C_MCI_WP_VSRC_MCI_DMA

#define AT91C_MCI_WP_VSRC_MCI_CFG

#define AT91C_MCI_WP_VSRC_MCI_DEL

#define AT91C_MCI_VER

#define AT91C_TWI_START

#define AT91C_TWI_STOP

#define AT91C_TWI_MSEN

#define AT91C_TWI_MSDIS

#define AT91C_TWI_SVEN

#define AT91C_TWI_SVDIS

#define AT91C_TWI_SWRST

#define AT91C_TWI_IADRSZ

#define AT91C_TWI_IADRSZ_NO

#define AT91C_TWI_IADRSZ_1_BYTE

#define AT91C_TWI_IADRSZ_2_BYTE

#define AT91C_TWI_IADRSZ_3_BYTE

#define AT91C_TWI_MREAD

#define AT91C_TWI_DADR

#define AT91C_TWI_SADR

#define AT91C_TWI_CLDIV

#define AT91C_TWI_CHDIV

#define AT91C_TWI_CKDIV

#define AT91C_TWI_TXCOMP_SLAVE

#define AT91C_TWI_TXCOMP_MASTER

#define AT91C_TWI_RXRDY

#define AT91C_TWI_TXRDY_MASTER

#define AT91C_TWI_TXRDY_SLAVE

#define AT91C_TWI_SVREAD

#define AT91C_TWI_SVACC

#define AT91C_TWI_GACC

#define AT91C_TWI_OVRE

#define AT91C_TWI_NACK_SLAVE

#define AT91C_TWI_NACK_MASTER

#define AT91C_TWI_ARBLST_MULTI_MASTER

#define AT91C_TWI_SCLWS

#define AT91C_TWI_EOSACC

#define AT91C_TWI_ENDRX

#define AT91C_TWI_ENDTX

#define AT91C_TWI_RXBUFF

#define AT91C_TWI_TXBUFE

#define US_CR_OFF 0x00000000

#define US_MR_OFF 0x00000004

#define US_IER_OFF 0x00000008

#define US_IDR_OFF 0x0000000C

#define US_IMR_OFF 0x00000010

#define US_CSR_OFF 0x00000014

#define US_RHR_OFF 0x00000018

#define US_THR_OFF 0x0000001C

#define US_BRGR_OFF 0x00000020

#define US_RTOR_OFF 0x00000024

#define US_TTGR_OFF 0x00000028

#define US_FIDI_OFF 0x00000040

#define US_NER_OFF 0x00000044

#define US_IF_OFF 0x0000004C

#define US_MAN_OFF 0x00000050

#define US_ADDRSIZE_OFF 0x000000EC

#define US_IPNAME1_OFF 0x000000F0

#define US_IPNAME2_OFF 0x000000F4

#define US_FEATURES_OFF 0x000000F8

#define US_VER_OFF 0x000000FC

#define US_RSTRX

#define US_RSTTX

#define US_RXEN

#define US_RXDIS

#define US_TXEN

#define US_TXDIS

#define US_RSTSTA

#define US_STTBRK

#define US_STPBRK

#define US_STTTO

#define US_SENDA

#define US_RSTIT

#define US_RSTNACK

#define US_RETTO

#define US_DTREN

#define US_DTRDIS

#define US_RTSEN

#define US_RTSDIS

#define US_USMODE

#define US_USMODE_NORMAL 0x0

#define US_USMODE_RS485 0x1

#define US_USMODE_HWHSH 0x2

#define US_USMODE_MODEM 0x3

#define US_USMODE_ISO7816_0 0x4

#define US_USMODE_ISO7816_1 0x6

#define US_USMODE_IRDA 0x8

#define US_USMODE_SWHSH 0xC

#define US_CLKS

#define US_CLKS_MCK

#define US_CLKS_MCK8

#define US_CLKS_SLCK

#define US_CLKS_SCK

#define US_CHRL

#define US_CHRL_5

#define US_CHRL_6

#define US_CHRL_7

#define US_CHRL_8

#define US_SYNC

#define US_PAR

#define US_PAR_EVEN

#define US_PAR_ODD

#define US_PAR_SPACE

#define US_PAR_MARK

#define US_PAR_NO

#define US_PAR_MULTIDROP

#define US_NBSTOP

#define US_NBSTOP_1

#define US_NBSTOP_15

#define US_NBSTOP_2_BIT

#define US_CHMODE

#define US_CHMODE_NORMAL

#define US_CHMODE_AUTO

#define US_CHMODE_LOCAL

#define US_CHMODE_REMOTE

#define US_MSBF

#define US_MODE9

#define US_CKLO

#define US_OVER

#define US_INACK

#define US_DSNACK

#define US_VAR_SYNC

#define US_MAX_ITER

#define US_FILTER

#define US_MANMODE

#define US_MODSYNC

#define US_ONEBIT

#define US_RXRDY

#define US_TXRDY

#define US_RXBRK

#define US_ENDRX

#define US_ENDTX

#define US_OVRE

#define US_FRAME

#define US_PARE

#define US_TIMEOUT

#define US_TXEMPTY

#define US_ITERATION

#define US_TXBUFE

#define US_RXBUFF

#define US_NACK

#define US_RIIC

#define US_DSRIC

#define US_DCDIC

#define US_CTSIC

#define US_MANE

#define US_RI

#define US_DSR

#define US_DCD

#define US_CTS

#define US_MANERR

#define US_TX_PL

#define US_TX_PP

#define US_TX_PP_ALL_ONE

#define US_TX_PP_ALL_ZERO

#define US_TX_PP_ZERO_ONE

#define US_TX_PP_ONE_ZERO

#define US_TX_MPOL

#define US_RX_PL

#define US_RX_PP

#define US_RX_PP_ALL_ONE

#define US_RX_PP_ALL_ZERO

#define US_RX_PP_ZERO_ONE

#define US_RX_PP_ONE_ZERO

#define US_RX_MPOL

#define US_DRIFT

#define AT91C_SSC_RXEN

#define AT91C_SSC_RXDIS

#define AT91C_SSC_TXEN

#define AT91C_SSC_TXDIS

#define AT91C_SSC_SWRST

#define AT91C_SSC_CKS

#define AT91C_SSC_CKS_DIV 0x0

#define AT91C_SSC_CKS_TK 0x1

#define AT91C_SSC_CKS_RK 0x2

#define AT91C_SSC_CKO

#define AT91C_SSC_CKO_NONE

#define AT91C_SSC_CKO_CONTINOUS

#define AT91C_SSC_CKO_DATA_TX

#define AT91C_SSC_CKI

#define AT91C_SSC_CKG

#define AT91C_SSC_CKG_NONE

#define AT91C_SSC_CKG_LOW

#define AT91C_SSC_CKG_HIGH

#define AT91C_SSC_START

#define AT91C_SSC_START_CONTINOUS

#define AT91C_SSC_START_TX

#define AT91C_SSC_START_LOW_RF

#define AT91C_SSC_START_HIGH_RF

#define AT91C_SSC_START_FALL_RF

#define AT91C_SSC_START_RISE_RF

#define AT91C_SSC_START_LEVEL_RF

#define AT91C_SSC_START_EDGE_RF

#define AT91C_SSC_START_0

#define AT91C_SSC_STOP

#define AT91C_SSC_STTDLY

#define AT91C_SSC_PERIOD

#define AT91C_SSC_DATLEN

#define AT91C_SSC_LOOP

#define AT91C_SSC_MSBF

#define AT91C_SSC_DATNB

#define AT91C_SSC_FSLEN

#define AT91C_SSC_FSOS

#define AT91C_SSC_FSOS_NONE

#define AT91C_SSC_FSOS_NEGATIVE

#define AT91C_SSC_FSOS_POSITIVE

#define AT91C_SSC_FSOS_LOW

#define AT91C_SSC_FSOS_HIGH

#define AT91C_SSC_FSOS_TOGGLE

#define AT91C_SSC_FSEDGE

#define AT91C_SSC_DATDEF

#define AT91C_SSC_FSDEN

#define AT91C_SSC_TXRDY

#define AT91C_SSC_TXEMPTY

#define AT91C_SSC_ENDTX

#define AT91C_SSC_TXBUFE

#define AT91C_SSC_RXRDY

#define AT91C_SSC_OVRUN

#define AT91C_SSC_ENDRX

#define AT91C_SSC_RXBUFF

#define AT91C_SSC_CP0

#define AT91C_SSC_CP1

#define AT91C_SSC_TXSYN

#define AT91C_SSC_RXSYN

#define AT91C_SSC_TXENA

#define AT91C_SSC_RXENA

#define AT91C_PWMC_CPRE

#define AT91C_PWMC_CPRE_MCK 0x0

#define AT91C_PWMC_CPRE_MCK_DIV_2 0x1

#define AT91C_PWMC_CPRE_MCK_DIV_4 0x2

#define AT91C_PWMC_CPRE_MCK_DIV_8 0x3

#define AT91C_PWMC_CPRE_MCK_DIV_16 0x4

#define AT91C_PWMC_CPRE_MCK_DIV_32 0x5

#define AT91C_PWMC_CPRE_MCK_DIV_64 0x6

#define AT91C_PWMC_CPRE_MCK_DIV_128 0x7

#define AT91C_PWMC_CPRE_MCK_DIV_256 0x8

#define AT91C_PWMC_CPRE_MCK_DIV_512 0x9

#define AT91C_PWMC_CPRE_MCK_DIV_1024 0xA

#define AT91C_PWMC_CPRE_MCKA 0xB

#define AT91C_PWMC_CPRE_MCKB 0xC

#define AT91C_PWMC_CALG

#define AT91C_PWMC_CPOL

#define AT91C_PWMC_CES

#define AT91C_PWMC_DTE

#define AT91C_PWMC_DTHI

#define AT91C_PWMC_DTLI

#define AT91C_PWMC_CDTY

#define AT91C_PWMC_CDTYUPD

#define AT91C_PWMC_CPRD

#define AT91C_PWMC_CPRDUPD

#define AT91C_PWMC_CCNT

#define AT91C_PWMC_DTL

#define AT91C_PWMC_DTH

#define AT91C_PWMC_DTLUPD

#define AT91C_PWMC_DTHUPD

#define AT91C_PWMC_DIVA

#define AT91C_PWMC_PREA

#define AT91C_PWMC_PREA_MCK

#define AT91C_PWMC_PREA_MCK_DIV_2

#define AT91C_PWMC_PREA_MCK_DIV_4

#define AT91C_PWMC_PREA_MCK_DIV_8

#define AT91C_PWMC_PREA_MCK_DIV_16

#define AT91C_PWMC_PREA_MCK_DIV_32

#define AT91C_PWMC_PREA_MCK_DIV_64

#define AT91C_PWMC_PREA_MCK_DIV_128

#define AT91C_PWMC_PREA_MCK_DIV_256

#define AT91C_PWMC_DIVB

#define AT91C_PWMC_PREB

#define AT91C_PWMC_PREB_MCK

#define AT91C_PWMC_PREB_MCK_DIV_2

#define AT91C_PWMC_PREB_MCK_DIV_4

#define AT91C_PWMC_PREB_MCK_DIV_8

#define AT91C_PWMC_PREB_MCK_DIV_16

#define AT91C_PWMC_PREB_MCK_DIV_32

#define AT91C_PWMC_PREB_MCK_DIV_64

#define AT91C_PWMC_PREB_MCK_DIV_128

#define AT91C_PWMC_PREB_MCK_DIV_256

#define AT91C_PWMC_CLKSEL

#define AT91C_PWMC_CHID0

#define AT91C_PWMC_CHID1

#define AT91C_PWMC_CHID2

#define AT91C_PWMC_CHID3

#define AT91C_PWMC_CHID4

#define AT91C_PWMC_CHID5

#define AT91C_PWMC_CHID6

#define AT91C_PWMC_CHID7

#define AT91C_PWMC_CHID8

#define AT91C_PWMC_CHID9

#define AT91C_PWMC_CHID10

#define AT91C_PWMC_CHID11

#define AT91C_PWMC_CHID12

#define AT91C_PWMC_CHID13

#define AT91C_PWMC_CHID14

#define AT91C_PWMC_CHID15

#define AT91C_PWMC_FCHID0

#define AT91C_PWMC_FCHID1

#define AT91C_PWMC_FCHID2

#define AT91C_PWMC_FCHID3

#define AT91C_PWMC_FCHID4

#define AT91C_PWMC_FCHID5

#define AT91C_PWMC_FCHID6

#define AT91C_PWMC_FCHID7

#define AT91C_PWMC_FCHID8

#define AT91C_PWMC_FCHID9

#define AT91C_PWMC_FCHID10

#define AT91C_PWMC_FCHID11

#define AT91C_PWMC_FCHID12

#define AT91C_PWMC_FCHID13

#define AT91C_PWMC_FCHID14

#define AT91C_PWMC_FCHID15

#define AT91C_PWMC_SYNC0

#define AT91C_PWMC_SYNC1

#define AT91C_PWMC_SYNC2

#define AT91C_PWMC_SYNC3

#define AT91C_PWMC_SYNC4

#define AT91C_PWMC_SYNC5

#define AT91C_PWMC_SYNC6

#define AT91C_PWMC_SYNC7

#define AT91C_PWMC_SYNC8

#define AT91C_PWMC_SYNC9

#define AT91C_PWMC_SYNC10

#define AT91C_PWMC_SYNC11

#define AT91C_PWMC_SYNC12

#define AT91C_PWMC_SYNC13

#define AT91C_PWMC_SYNC14

#define AT91C_PWMC_SYNC15

#define AT91C_PWMC_UPDM

#define AT91C_PWMC_UPDM_MODE0

#define AT91C_PWMC_UPDM_MODE1

#define AT91C_PWMC_UPDM_MODE2

#define AT91C_PWMC_UPDULOCK

#define AT91C_PWMC_UPR

#define AT91C_PWMC_UPRCNT

#define AT91C_PWMC_UPVUPDAL

#define AT91C_PWMC_WRDY

#define AT91C_PWMC_ENDTX

#define AT91C_PWMC_TXBUFE

#define AT91C_PWMC_UNRE

#define AT91C_PWMC_CMPM0

#define AT91C_PWMC_CMPM1

#define AT91C_PWMC_CMPM2

#define AT91C_PWMC_CMPM3

#define AT91C_PWMC_CMPM4

#define AT91C_PWMC_CMPM5

#define AT91C_PWMC_CMPM6

#define AT91C_PWMC_CMPM7

#define AT91C_PWMC_CMPU0

#define AT91C_PWMC_CMPU1

#define AT91C_PWMC_CMPU2

#define AT91C_PWMC_CMPU3

#define AT91C_PWMC_CMPU4

#define AT91C_PWMC_CMPU5

#define AT91C_PWMC_CMPU6

#define AT91C_PWMC_CMPU7

#define AT91C_PWMC_OOVH0

#define AT91C_PWMC_OOVH1

#define AT91C_PWMC_OOVH2

#define AT91C_PWMC_OOVH3

#define AT91C_PWMC_OOVH4

#define AT91C_PWMC_OOVH5

#define AT91C_PWMC_OOVH6

#define AT91C_PWMC_OOVH7

#define AT91C_PWMC_OOVH8

#define AT91C_PWMC_OOVH9

#define AT91C_PWMC_OOVH10

#define AT91C_PWMC_OOVH11

#define AT91C_PWMC_OOVH12

#define AT91C_PWMC_OOVH13

#define AT91C_PWMC_OOVH14

#define AT91C_PWMC_OOVH15

#define AT91C_PWMC_OOVL0

#define AT91C_PWMC_OOVL1

#define AT91C_PWMC_OOVL2

#define AT91C_PWMC_OOVL3

#define AT91C_PWMC_OOVL4

#define AT91C_PWMC_OOVL5

#define AT91C_PWMC_OOVL6

#define AT91C_PWMC_OOVL7

#define AT91C_PWMC_OOVL8

#define AT91C_PWMC_OOVL9

#define AT91C_PWMC_OOVL10

#define AT91C_PWMC_OOVL11

#define AT91C_PWMC_OOVL12

#define AT91C_PWMC_OOVL13

#define AT91C_PWMC_OOVL14

#define AT91C_PWMC_OOVL15

#define AT91C_PWMC_OSH0

#define AT91C_PWMC_OSH1

#define AT91C_PWMC_OSH2

#define AT91C_PWMC_OSH3

#define AT91C_PWMC_OSH4

#define AT91C_PWMC_OSH5

#define AT91C_PWMC_OSH6

#define AT91C_PWMC_OSH7

#define AT91C_PWMC_OSH8

#define AT91C_PWMC_OSH9

#define AT91C_PWMC_OSH10

#define AT91C_PWMC_OSH11

#define AT91C_PWMC_OSH12

#define AT91C_PWMC_OSH13

#define AT91C_PWMC_OSH14

#define AT91C_PWMC_OSH15

#define AT91C_PWMC_OSL0

#define AT91C_PWMC_OSL1

#define AT91C_PWMC_OSL2

#define AT91C_PWMC_OSL3

#define AT91C_PWMC_OSL4

#define AT91C_PWMC_OSL5

#define AT91C_PWMC_OSL6

#define AT91C_PWMC_OSL7

#define AT91C_PWMC_OSL8

#define AT91C_PWMC_OSL9

#define AT91C_PWMC_OSL10

#define AT91C_PWMC_OSL11

#define AT91C_PWMC_OSL12

#define AT91C_PWMC_OSL13

#define AT91C_PWMC_OSL14

#define AT91C_PWMC_OSL15

#define AT91C_PWMC_OSSH0

#define AT91C_PWMC_OSSH1

#define AT91C_PWMC_OSSH2

#define AT91C_PWMC_OSSH3

#define AT91C_PWMC_OSSH4

#define AT91C_PWMC_OSSH5

#define AT91C_PWMC_OSSH6

#define AT91C_PWMC_OSSH7

#define AT91C_PWMC_OSSH8

#define AT91C_PWMC_OSSH9

#define AT91C_PWMC_OSSH10

#define AT91C_PWMC_OSSH11

#define AT91C_PWMC_OSSH12

#define AT91C_PWMC_OSSH13

#define AT91C_PWMC_OSSH14

#define AT91C_PWMC_OSSH15

#define AT91C_PWMC_OSSL0

#define AT91C_PWMC_OSSL1

#define AT91C_PWMC_OSSL2

#define AT91C_PWMC_OSSL3

#define AT91C_PWMC_OSSL4

#define AT91C_PWMC_OSSL5

#define AT91C_PWMC_OSSL6

#define AT91C_PWMC_OSSL7