#define GPIO_IRQn EINT3_IRQn
#define __MPU_PRESENT 1
#define __NVIC_PRIO_BITS 5
#define __Vendor_SysTickConfig 0
#define LPC_FLASH_BASE 0x00000000UL
#define LPC_RAM_BASE 0x10000000UL
#define LPC_GPIO_BASE 0x2009C000UL
#define LPC_APB0_BASE 0x40000000UL
#define LPC_APB1_BASE 0x40080000UL
#define LPC_AHB_BASE 0x50000000UL
#define LPC_CM3_BASE 0xE0000000UL
#define LPC_WDT_BASE
#define LPC_TIM0_BASE
#define LPC_TIM1_BASE
#define LPC_UART0_BASE
#define LPC_UART1_BASE
#define LPC_PWM1_BASE
#define LPC_I2C0_BASE
#define LPC_SPI_BASE
#define LPC_RTC_BASE
#define LPC_GPIOINT_BASE
#define LPC_PINCON_BASE
#define LPC_SSP1_BASE
#define LPC_ADC_BASE
#define LPC_CANAF_RAM_BASE
#define LPC_CANAF_BASE
#define LPC_CANCR_BASE
#define LPC_CAN1_BASE
#define LPC_CAN2_BASE
#define LPC_I2C1_BASE
#define LPC_SSP0_BASE
#define LPC_DAC_BASE
#define LPC_TIM2_BASE
#define LPC_TIM3_BASE
#define LPC_UART2_BASE
#define LPC_UART3_BASE
#define LPC_I2C2_BASE
#define LPC_I2S_BASE
#define LPC_RIT_BASE
#define LPC_MCPWM_BASE
#define LPC_QEI_BASE
#define LPC_SC_BASE
#define LPC_EMAC_BASE
#define LPC_GPDMA_BASE
#define LPC_GPDMACH0_BASE
#define LPC_GPDMACH1_BASE
#define LPC_GPDMACH2_BASE
#define LPC_GPDMACH3_BASE
#define LPC_GPDMACH4_BASE
#define LPC_GPDMACH5_BASE
#define LPC_GPDMACH6_BASE
#define LPC_GPDMACH7_BASE
#define LPC_USB_BASE
#define LPC_GPIO0_BASE
#define LPC_GPIO1_BASE
#define LPC_GPIO2_BASE
#define LPC_GPIO3_BASE
#define LPC_GPIO4_BASE
#define LPC_SC
#define LPC_GPIO0
#define LPC_GPIO1
#define LPC_GPIO2
#define LPC_GPIO3
#define LPC_GPIO4
#define LPC_WDT
#define LPC_TIM0
#define LPC_TIM1
#define LPC_TIM2
#define LPC_TIM3
#define LPC_RIT
#define LPC_UART0
#define LPC_UART1
#define LPC_UART2
#define LPC_UART3
#define LPC_PWM1
#define LPC_I2C0
#define LPC_I2C1
#define LPC_I2C2
#define LPC_I2S
#define LPC_SPI
#define LPC_RTC
#define LPC_GPIOINT
#define LPC_PINCON
#define LPC_SSP0
#define LPC_SSP1
#define LPC_ADC
#define LPC_DAC
#define LPC_CANAF_RAM
#define LPC_CANAF
#define LPC_CANCR
#define LPC_CAN1
#define LPC_CAN2
#define LPC_MCPWM
#define LPC_QEI
#define LPC_EMAC
#define LPC_GPDMA
#define LPC_GPDMACH0
#define LPC_GPDMACH1
#define LPC_GPDMACH2
#define LPC_GPDMACH3
#define LPC_GPDMACH4
#define LPC_GPDMACH5
#define LPC_GPDMACH6
#define LPC_GPDMACH7
#define LPC_USB
enum IRQn | |
{ | |
NonMaskableInt_IRQn; | |
HardFault_IRQn; | |
MemoryManagement_IRQn; | |
BusFault_IRQn; | |
UsageFault_IRQn; | |
SVCall_IRQn; | |
DebugMonitor_IRQn; | |
PendSV_IRQn; | |
SysTick_IRQn; | |
WDT_IRQn; | |
TIMER0_IRQn; | |
TIMER1_IRQn; | |
TIMER2_IRQn; | |
TIMER3_IRQn; | |
UART0_IRQn; | |
UART1_IRQn; | |
UART2_IRQn; | |
UART3_IRQn; | |
PWM1_IRQn; | |
I2C0_IRQn; | |
I2C1_IRQn; | |
I2C2_IRQn; | |
SPI_IRQn; | |
SSP0_IRQn; | |
SSP1_IRQn; | |
PLL0_IRQn; | |
RTC_IRQn; | |
EINT0_IRQn; | |
EINT1_IRQn; | |
EINT2_IRQn; | |
EINT3_IRQn; | |
ADC_IRQn; | |
BOD_IRQn; | |
USB_IRQn; | |
CAN_IRQn; | |
DMA_IRQn; | |
I2S_IRQn; | |
ENET_IRQn; | |
RIT_IRQn; | |
MCPWM_IRQn; | |
QEI_IRQn; | |
PLL1_IRQn; | |
USBActivity_IRQn; | |
CANActivity_IRQn; | |
IRQn_MAX; | |
} |
struct | |
{ | |
volatile uint32_t FLASHCFG; | |
uint32_t RESERVED0[31]; | |
volatile uint32_t PLL0CON; | |
volatile uint32_t PLL0CFG; | |
volatile const uint32_t PLL0STAT; | |
volatile uint32_t PLL0FEED; | |
uint32_t RESERVED1[4]; | |
volatile uint32_t PLL1CON; | |
volatile uint32_t PLL1CFG; | |
volatile const uint32_t PLL1STAT; | |
volatile uint32_t PLL1FEED; | |
uint32_t RESERVED2[4]; | |
volatile uint32_t PCON; | |
volatile uint32_t PCONP; | |
uint32_t RESERVED3[15]; | |
volatile uint32_t CCLKCFG; | |
volatile uint32_t USBCLKCFG; | |
volatile uint32_t CLKSRCSEL; | |
uint32_t RESERVED4[12]; | |
volatile uint32_t EXTINT; | |
uint32_t RESERVED5; | |
volatile uint32_t EXTMODE; | |
volatile uint32_t EXTPOLAR; | |
uint32_t RESERVED6[12]; | |
volatile uint32_t RSID; | |
uint32_t RESERVED7[7]; | |
volatile uint32_t SCS; | |
volatile uint32_t IRCTRIM; | |
volatile uint32_t PCLKSEL0; | |
volatile uint32_t PCLKSEL1; | |
uint32_t RESERVED8[4]; | |
volatile uint32_t USBIntSt; | |
volatile uint32_t DMAREQSEL; | |
volatile uint32_t CLKOUTCFG; | |
} |
struct | |
{ | |
volatile uint32_t PINSEL0; | |
volatile uint32_t PINSEL1; | |
volatile uint32_t PINSEL2; | |
volatile uint32_t PINSEL3; | |
volatile uint32_t PINSEL4; | |
volatile uint32_t PINSEL5; | |
volatile uint32_t PINSEL6; | |
volatile uint32_t PINSEL7; | |
volatile uint32_t PINSEL8; | |
volatile uint32_t PINSEL9; | |
volatile uint32_t PINSEL10; | |
uint32_t RESERVED0[5]; | |
volatile uint32_t PINMODE0; | |
volatile uint32_t PINMODE1; | |
volatile uint32_t PINMODE2; | |
volatile uint32_t PINMODE3; | |
volatile uint32_t PINMODE4; | |
volatile uint32_t PINMODE5; | |
volatile uint32_t PINMODE6; | |
volatile uint32_t PINMODE7; | |
volatile uint32_t PINMODE8; | |
volatile uint32_t PINMODE9; | |
volatile uint32_t PINMODE_OD0; | |
volatile uint32_t PINMODE_OD1; | |
volatile uint32_t PINMODE_OD2; | |
volatile uint32_t PINMODE_OD3; | |
volatile uint32_t PINMODE_OD4; | |
volatile uint32_t I2CPADCFG; | |
} |
struct | |
{ | |
union | |
{ | |
volatile uint32_t FIODIR; | |
struct | |
{ | |
volatile uint16_t FIODIRL; | |
volatile uint16_t FIODIRH; | |
} | |
; | |
struct | |
{ | |
volatile uint8_t FIODIR0; | |
volatile uint8_t FIODIR1; | |
volatile uint8_t FIODIR2; | |
volatile uint8_t FIODIR3; | |
} | |
; | |
} | |
; | |
uint32_t RESERVED0[3]; | |
union | |
{ | |
volatile uint32_t FIOMASK; | |
struct | |
{ | |
volatile uint16_t FIOMASKL; | |
volatile uint16_t FIOMASKH; | |
} | |
; | |
struct | |
{ | |
volatile uint8_t FIOMASK0; | |
volatile uint8_t FIOMASK1; | |
volatile uint8_t FIOMASK2; | |
volatile uint8_t FIOMASK3; | |
} | |
; | |
} | |
; | |
union | |
{ | |
volatile uint32_t FIOPIN; | |
struct | |
{ | |
volatile uint16_t FIOPINL; | |
volatile uint16_t FIOPINH; | |
} | |
; | |
struct | |
{ | |
volatile uint8_t FIOPIN0; | |
volatile uint8_t FIOPIN1; | |
volatile uint8_t FIOPIN2; | |
volatile uint8_t FIOPIN3; | |
} | |
; | |
} | |
; | |
union | |
{ | |
volatile uint32_t FIOSET; | |
struct | |
{ | |
volatile uint16_t FIOSETL; | |
volatile uint16_t FIOSETH; | |
} | |
; | |
struct | |
{ | |
volatile uint8_t FIOSET0; | |
volatile uint8_t FIOSET1; | |
volatile uint8_t FIOSET2; | |
volatile uint8_t FIOSET3; | |
} | |
; | |
} | |
; | |
union | |
{ | |
volatile uint32_t FIOCLR; | |
struct | |
{ | |
volatile uint16_t FIOCLRL; | |
volatile uint16_t FIOCLRH; | |
} | |
; | |
struct | |
{ | |
volatile uint8_t FIOCLR0; | |
volatile uint8_t FIOCLR1; | |
volatile uint8_t FIOCLR2; | |
volatile uint8_t FIOCLR3; | |
} | |
; | |
} | |
; | |
} |
struct | |
{ | |
volatile const uint32_t IntStatus; | |
volatile const uint32_t IO0IntStatR; | |
volatile const uint32_t IO0IntStatF; | |
volatile uint32_t IO0IntClr; | |
volatile uint32_t IO0IntEnR; | |
volatile uint32_t IO0IntEnF; | |
uint32_t RESERVED0[3]; | |
volatile const uint32_t IO2IntStatR; | |
volatile const uint32_t IO2IntStatF; | |
volatile uint32_t IO2IntClr; | |
volatile uint32_t IO2IntEnR; | |
volatile uint32_t IO2IntEnF; | |
} |
struct | |
{ | |
volatile uint32_t IR; | |
volatile uint32_t TCR; | |
volatile uint32_t TC; | |
volatile uint32_t PR; | |
volatile uint32_t PC; | |
volatile uint32_t MCR; | |
volatile uint32_t MR0; | |
volatile uint32_t MR1; | |
volatile uint32_t MR2; | |
volatile uint32_t MR3; | |
volatile uint32_t CCR; | |
volatile const uint32_t CR0; | |
volatile const uint32_t CR1; | |
uint32_t RESERVED0[2]; | |
volatile uint32_t EMR; | |
uint32_t RESERVED1[12]; | |
volatile uint32_t CTCR; | |
} |
struct | |
{ | |
volatile uint32_t IR; | |
volatile uint32_t TCR; | |
volatile uint32_t TC; | |
volatile uint32_t PR; | |
volatile uint32_t PC; | |
volatile uint32_t MCR; | |
volatile uint32_t MR0; | |
volatile uint32_t MR1; | |
volatile uint32_t MR2; | |
volatile uint32_t MR3; | |
volatile uint32_t CCR; | |
volatile const uint32_t CR0; | |
volatile const uint32_t CR1; | |
volatile const uint32_t CR2; | |
volatile const uint32_t CR3; | |
uint32_t RESERVED0; | |
volatile uint32_t MR4; | |
volatile uint32_t MR5; | |
volatile uint32_t MR6; | |
volatile uint32_t PCR; | |
volatile uint32_t LER; | |
uint32_t RESERVED1[7]; | |
volatile uint32_t CTCR; | |
} |
struct | |
{ | |
union | |
{ | |
volatile const uint8_t RBR; | |
volatile uint8_t THR; | |
volatile uint8_t DLL; | |
uint32_t RESERVED0; | |
} | |
; | |
union | |
{ | |
volatile uint8_t DLM; | |
volatile uint32_t IER; | |
} | |
; | |
union | |
{ | |
volatile const uint32_t IIR; | |
volatile uint8_t FCR; | |
} | |
; | |
volatile uint8_t LCR; | |
uint8_t RESERVED1[7]; | |
volatile const uint8_t LSR; | |
uint8_t RESERVED2[7]; | |
volatile uint8_t SCR; | |
uint8_t RESERVED3[3]; | |
volatile uint32_t ACR; | |
volatile uint8_t ICR; | |
uint8_t RESERVED4[3]; | |
volatile uint8_t FDR; | |
uint8_t RESERVED5[7]; | |
volatile uint8_t TER; | |
uint8_t RESERVED6[39]; | |
volatile const uint8_t FIFOLVL; | |
} |
struct | |
{ | |
union | |
{ | |
volatile const uint8_t RBR; | |
volatile uint8_t THR; | |
volatile uint8_t DLL; | |
uint32_t RESERVED0; | |
} | |
; | |
union | |
{ | |
volatile uint8_t DLM; | |
volatile uint32_t IER; | |
} | |
; | |
union | |
{ | |
volatile const uint32_t IIR; | |
volatile uint8_t FCR; | |
} | |
; | |
volatile uint8_t LCR; | |
uint8_t RESERVED1[3]; | |
volatile uint8_t MCR; | |
uint8_t RESERVED2[3]; | |
volatile const uint8_t LSR; | |
uint8_t RESERVED3[3]; | |
volatile const uint8_t MSR; | |
uint8_t RESERVED4[3]; | |
volatile uint8_t SCR; | |
uint8_t RESERVED5[3]; | |
volatile uint32_t ACR; | |
uint32_t RESERVED6; | |
volatile uint32_t FDR; | |
uint32_t RESERVED7; | |
volatile uint8_t TER; | |
uint8_t RESERVED8[27]; | |
volatile uint8_t RS485CTRL; | |
uint8_t RESERVED9[3]; | |
volatile uint8_t ADRMATCH; | |
uint8_t RESERVED10[3]; | |
volatile uint8_t RS485DLY; | |
uint8_t RESERVED11[3]; | |
volatile const uint8_t FIFOLVL; | |
} |
struct | |
{ | |
volatile uint32_t SPCR; | |
volatile const uint32_t SPSR; | |
volatile uint32_t SPDR; | |
volatile uint32_t SPCCR; | |
uint32_t RESERVED0[3]; | |
volatile uint32_t SPINT; | |
} |
struct | |
{ | |
volatile uint32_t CR0; | |
volatile uint32_t CR1; | |
volatile uint32_t DR; | |
volatile const uint32_t SR; | |
volatile uint32_t CPSR; | |
volatile uint32_t IMSC; | |
volatile uint32_t RIS; | |
volatile uint32_t MIS; | |
volatile uint32_t ICR; | |
volatile uint32_t DMACR; | |
} |
struct | |
{ | |
volatile uint32_t I2CONSET; | |
volatile const uint32_t I2STAT; | |
volatile uint32_t I2DAT; | |
volatile uint32_t I2ADR0; | |
volatile uint32_t I2SCLH; | |
volatile uint32_t I2SCLL; | |
volatile uint32_t I2CONCLR; | |
volatile uint32_t MMCTRL; | |
volatile uint32_t I2ADR1; | |
volatile uint32_t I2ADR2; | |
volatile uint32_t I2ADR3; | |
volatile const uint32_t I2DATA_BUFFER; | |
volatile uint32_t I2MASK0; | |
volatile uint32_t I2MASK1; | |
volatile uint32_t I2MASK2; | |
volatile uint32_t I2MASK3; | |
} |
struct | |
{ | |
volatile uint32_t DAO; | |
volatile uint32_t DAI; | |
volatile uint32_t TXFIFO; | |
volatile const uint32_t RXFIFO; | |
volatile const uint32_t STATE; | |
volatile uint32_t DMA1; | |
volatile uint32_t DMA2; | |
volatile uint32_t IRQ; | |
volatile uint32_t TXRATE; | |
volatile uint32_t RXRATE; | |
volatile uint32_t TXBITRATE; | |
volatile uint32_t RXBITRATE; | |
volatile uint32_t TXMODE; | |
volatile uint32_t RXMODE; | |
} |
struct | |
{ | |
volatile uint32_t RICOMPVAL; | |
volatile uint32_t RIMASK; | |
volatile uint8_t RICTRL; | |
uint8_t RESERVED0[3]; | |
volatile uint32_t RICOUNTER; | |
} |
struct | |
{ | |
volatile uint8_t ILR; | |
uint8_t RESERVED0[7]; | |
volatile uint8_t CCR; | |
uint8_t RESERVED1[3]; | |
volatile uint8_t CIIR; | |
uint8_t RESERVED2[3]; | |
volatile uint8_t AMR; | |
uint8_t RESERVED3[3]; | |
volatile const uint32_t CTIME0; | |
volatile const uint32_t CTIME1; | |
volatile const uint32_t CTIME2; | |
volatile uint8_t SEC; | |
uint8_t RESERVED4[3]; | |
volatile uint8_t MIN; | |
uint8_t RESERVED5[3]; | |
volatile uint8_t HOUR; | |
uint8_t RESERVED6[3]; | |
volatile uint8_t DOM; | |
uint8_t RESERVED7[3]; | |
volatile uint8_t DOW; | |
uint8_t RESERVED8[3]; | |
volatile uint16_t DOY; | |
uint16_t RESERVED9; | |
volatile uint8_t MONTH; | |
uint8_t RESERVED10[3]; | |
volatile uint16_t YEAR; | |
uint16_t RESERVED11; | |
volatile uint32_t CALIBRATION; | |
volatile uint32_t GPREG0; | |
volatile uint32_t GPREG1; | |
volatile uint32_t GPREG2; | |
volatile uint32_t GPREG3; | |
volatile uint32_t GPREG4; | |
volatile uint8_t RTC_AUXEN; | |
uint8_t RESERVED12[3]; | |
volatile uint8_t RTC_AUX; | |
uint8_t RESERVED13[3]; | |
volatile uint8_t ALSEC; | |
uint8_t RESERVED14[3]; | |
volatile uint8_t ALMIN; | |
uint8_t RESERVED15[3]; | |
volatile uint8_t ALHOUR; | |
uint8_t RESERVED16[3]; | |
volatile uint8_t ALDOM; | |
uint8_t RESERVED17[3]; | |
volatile uint8_t ALDOW; | |
uint8_t RESERVED18[3]; | |
volatile uint16_t ALDOY; | |
uint16_t RESERVED19; | |
volatile uint8_t ALMON; | |
uint8_t RESERVED20[3]; | |
volatile uint16_t ALYEAR; | |
uint16_t RESERVED21; | |
} |
struct | |
{ | |
volatile uint8_t MOD; | |
uint8_t RESERVED0[3]; | |
volatile uint32_t TC; | |
volatile uint8_t FEED; | |
uint8_t RESERVED1[3]; | |
volatile const uint32_t TV; | |
volatile uint32_t CLKSEL; | |
} |
struct | |
{ | |
volatile uint32_t ADCR; | |
volatile uint32_t GDR; | |
uint32_t RESERVED0; | |
volatile uint32_t ADINTEN; | |
volatile const uint32_t ADDR0; | |
volatile const uint32_t ADDR1; | |
volatile const uint32_t ADDR2; | |
volatile const uint32_t ADDR3; | |
volatile const uint32_t ADDR4; | |
volatile const uint32_t ADDR5; | |
volatile const uint32_t ADDR6; | |
volatile const uint32_t ADDR7; | |
volatile const uint32_t ADSTAT; | |
volatile uint32_t ADTRM; | |
} |
struct | |
{ | |
volatile uint32_t CR; | |
volatile uint32_t CTRL; | |
volatile uint16_t CNTVAL; | |
} |
struct | |
{ | |
volatile const uint32_t MCCON; | |
volatile uint32_t MCCON_SET; | |
volatile uint32_t MCCON_CLR; | |
volatile const uint32_t MCCAPCON; | |
volatile uint32_t MCCAPCON_SET; | |
volatile uint32_t MCCAPCON_CLR; | |
volatile uint32_t MCTIM0; | |
volatile uint32_t MCTIM1; | |
volatile uint32_t MCTIM2; | |
volatile uint32_t MCPER0; | |
volatile uint32_t MCPER1; | |
volatile uint32_t MCPER2; | |
volatile uint32_t MCPW0; | |
volatile uint32_t MCPW1; | |
volatile uint32_t MCPW2; | |
volatile uint32_t MCDEADTIME; | |
volatile uint32_t MCCCP; | |
volatile uint32_t MCCR0; | |
volatile uint32_t MCCR1; | |
volatile uint32_t MCCR2; | |
volatile const uint32_t MCINTEN; | |
volatile uint32_t MCINTEN_SET; | |
volatile uint32_t MCINTEN_CLR; | |
volatile const uint32_t MCCNTCON; | |
volatile uint32_t MCCNTCON_SET; | |
volatile uint32_t MCCNTCON_CLR; | |
volatile const uint32_t MCINTFLAG; | |
volatile uint32_t MCINTFLAG_SET; | |
volatile uint32_t MCINTFLAG_CLR; | |
volatile uint32_t MCCAP_CLR; | |
} |
struct | |
{ | |
volatile uint32_t QEICON; | |
volatile const uint32_t QEISTAT; | |
volatile uint32_t QEICONF; | |
volatile const uint32_t QEIPOS; | |
volatile uint32_t QEIMAXPOS; | |
volatile uint32_t CMPOS0; | |
volatile uint32_t CMPOS1; | |
volatile uint32_t CMPOS2; | |
volatile const uint32_t INXCNT; | |
volatile uint32_t INXCMP; | |
volatile uint32_t QEILOAD; | |
volatile const uint32_t QEITIME; | |
volatile const uint32_t QEIVEL; | |
volatile const uint32_t QEICAP; | |
volatile uint32_t VELCOMP; | |
volatile uint32_t FILTER; | |
uint32_t RESERVED0[998]; | |
volatile uint32_t QEIIEC; | |
volatile uint32_t QEIIES; | |
volatile const uint32_t QEIINTSTAT; | |
volatile const uint32_t QEIIE; | |
volatile uint32_t QEICLR; | |
volatile uint32_t QEISET; | |
} |
struct | |
{ | |
volatile uint32_t mask[512]; | |
} |
struct | |
{ | |
volatile uint32_t AFMR; | |
volatile uint32_t SFF_sa; | |
volatile uint32_t SFF_GRP_sa; | |
volatile uint32_t EFF_sa; | |
volatile uint32_t EFF_GRP_sa; | |
volatile uint32_t ENDofTable; | |
volatile const uint32_t LUTerrAd; | |
volatile const uint32_t LUTerr; | |
volatile uint32_t FCANIE; | |
volatile uint32_t FCANIC0; | |
volatile uint32_t FCANIC1; | |
} |
struct | |
{ | |
volatile const uint32_t CANTxSR; | |
volatile const uint32_t CANRxSR; | |
volatile const uint32_t CANMSR; | |
} |
struct | |
{ | |
volatile uint32_t MOD; | |
volatile uint32_t CMR; | |
volatile uint32_t GSR; | |
volatile const uint32_t ICR; | |
volatile uint32_t IER; | |
volatile uint32_t BTR; | |
volatile uint32_t EWL; | |
volatile const uint32_t SR; | |
volatile uint32_t RFS; | |
volatile uint32_t RID; | |
volatile uint32_t RDA; | |
volatile uint32_t RDB; | |
volatile uint32_t TFI1; | |
volatile uint32_t TID1; | |
volatile uint32_t TDA1; | |
volatile uint32_t TDB1; | |
volatile uint32_t TFI2; | |
volatile uint32_t TID2; | |
volatile uint32_t TDA2; | |
volatile uint32_t TDB2; | |
volatile uint32_t TFI3; | |
volatile uint32_t TID3; | |
volatile uint32_t TDA3; | |
volatile uint32_t TDB3; | |
} |
struct | |
{ | |
volatile const uint32_t IntStat; | |
volatile const uint32_t IntTCStat; | |
volatile uint32_t IntTCClear; | |
volatile const uint32_t IntErrStat; | |
volatile uint32_t IntErrClr; | |
volatile const uint32_t RawIntTCStat; | |
volatile const uint32_t RawIntErrStat; | |
volatile const uint32_t EnbldChns; | |
volatile uint32_t SoftBReq; | |
volatile uint32_t SoftSReq; | |
volatile uint32_t SoftLBReq; | |
volatile uint32_t SoftLSReq; | |
volatile uint32_t Config; | |
volatile uint32_t Sync; | |
} |
struct | |
{ | |
volatile uint32_t CSrcAddr; | |
volatile uint32_t CDestAddr; | |
volatile uint32_t CLLI; | |
volatile uint32_t CControl; | |
volatile uint32_t CConfig; | |
} |
struct | |
{ | |
volatile const uint32_t HcRevision; | |
volatile uint32_t HcControl; | |
volatile uint32_t HcCommandStatus; | |
volatile uint32_t HcInterruptStatus; | |
volatile uint32_t HcInterruptEnable; | |
volatile uint32_t HcInterruptDisable; | |
volatile uint32_t HcHCCA; | |
volatile const uint32_t HcPeriodCurrentED; | |
volatile uint32_t HcControlHeadED; | |
volatile uint32_t HcControlCurrentED; | |
volatile uint32_t HcBulkHeadED; | |
volatile uint32_t HcBulkCurrentED; | |
volatile const uint32_t HcDoneHead; | |
volatile uint32_t HcFmInterval; | |
volatile const uint32_t HcFmRemaining; | |
volatile const uint32_t HcFmNumber; | |
volatile uint32_t HcPeriodicStart; | |
volatile uint32_t HcLSTreshold; | |
volatile uint32_t HcRhDescriptorA; | |
volatile uint32_t HcRhDescriptorB; | |
volatile uint32_t HcRhStatus; | |
volatile uint32_t HcRhPortStatus1; | |
volatile uint32_t HcRhPortStatus2; | |
uint32_t RESERVED0[40]; | |
volatile const uint32_t Module_ID; | |
volatile const uint32_t OTGIntSt; | |
volatile uint32_t OTGIntEn; | |
volatile uint32_t OTGIntSet; | |
volatile uint32_t OTGIntClr; | |
volatile uint32_t OTGStCtrl; | |
volatile uint32_t OTGTmr; | |
uint32_t RESERVED1[58]; | |
volatile const uint32_t USBDevIntSt; | |
volatile uint32_t USBDevIntEn; | |
volatile uint32_t USBDevIntClr; | |
volatile uint32_t USBDevIntSet; | |
volatile uint32_t USBCmdCode; | |
volatile const uint32_t USBCmdData; | |
volatile const uint32_t USBRxData; | |
volatile uint32_t USBTxData; | |
volatile const uint32_t USBRxPLen; | |
volatile uint32_t USBTxPLen; | |
volatile uint32_t USBCtrl; | |
volatile uint32_t USBDevIntPri; | |
volatile const uint32_t USBEpIntSt; | |
volatile uint32_t USBEpIntEn; | |
volatile uint32_t USBEpIntClr; | |
volatile uint32_t USBEpIntSet; | |
volatile uint32_t USBEpIntPri; | |
volatile uint32_t USBReEp; | |
volatile uint32_t USBEpInd; | |
volatile uint32_t USBMaxPSize; | |
volatile const uint32_t USBDMARSt; | |
volatile uint32_t USBDMARClr; | |
volatile uint32_t USBDMARSet; | |
uint32_t RESERVED2[9]; | |
volatile uint32_t USBUDCAH; | |
volatile const uint32_t USBEpDMASt; | |
volatile uint32_t USBEpDMAEn; | |
volatile uint32_t USBEpDMADis; | |
volatile const uint32_t USBDMAIntSt; | |
volatile uint32_t USBDMAIntEn; | |
uint32_t RESERVED3[2]; | |
volatile const uint32_t USBEoTIntSt; | |
volatile uint32_t USBEoTIntClr; | |
volatile uint32_t USBEoTIntSet; | |
volatile const uint32_t USBNDDRIntSt; | |
volatile uint32_t USBNDDRIntClr; | |
volatile uint32_t USBNDDRIntSet; | |
volatile const uint32_t USBSysErrIntSt; | |
volatile uint32_t USBSysErrIntClr; | |
volatile uint32_t USBSysErrIntSet; | |
uint32_t RESERVED4[15]; | |
volatile const uint32_t I2C_RX; | |
volatile uint32_t I2C_WO; | |
volatile const uint32_t I2C_STS; | |
volatile uint32_t I2C_CTL; | |
volatile uint32_t I2C_CLKHI; | |
volatile uint32_t I2C_CLKLO; | |
uint32_t RESERVED5[823]; | |
union | |
{ | |
volatile uint32_t USBClkCtrl; | |
volatile uint32_t OTGClkCtrl; | |
} | |
; | |
union | |
{ | |
volatile const uint32_t USBClkSt; | |
volatile const uint32_t OTGClkSt; | |
} | |
; | |
} |
struct | |
{ | |
volatile uint32_t MAC1; | |
volatile uint32_t MAC2; | |
volatile uint32_t IPGT; | |
volatile uint32_t IPGR; | |
volatile uint32_t CLRT; | |
volatile uint32_t MAXF; | |
volatile uint32_t SUPP; | |
volatile uint32_t TEST; | |
volatile uint32_t MCFG; | |
volatile uint32_t MCMD; | |
volatile uint32_t MADR; | |
volatile uint32_t MWTD; | |
volatile const uint32_t MRDD; | |
volatile const uint32_t MIND; | |
uint32_t RESERVED0[2]; | |
volatile uint32_t SA0; | |
volatile uint32_t SA1; | |
volatile uint32_t SA2; | |
uint32_t RESERVED1[45]; | |
volatile uint32_t Command; | |
volatile const uint32_t Status; | |
volatile uint32_t RxDescriptor; | |
volatile uint32_t RxStatus; | |
volatile uint32_t RxDescriptorNumber; | |
volatile const uint32_t RxProduceIndex; | |
volatile uint32_t RxConsumeIndex; | |
volatile uint32_t TxDescriptor; | |
volatile uint32_t TxStatus; | |
volatile uint32_t TxDescriptorNumber; | |
volatile uint32_t TxProduceIndex; | |
volatile const uint32_t TxConsumeIndex; | |
uint32_t RESERVED2[10]; | |
volatile const uint32_t TSV0; | |
volatile const uint32_t TSV1; | |
volatile const uint32_t RSV; | |
uint32_t RESERVED3[3]; | |
volatile uint32_t FlowControlCounter; | |
volatile const uint32_t FlowControlStatus; | |
uint32_t RESERVED4[34]; | |
volatile uint32_t RxFilterCtrl; | |
volatile uint32_t RxFilterWoLStatus; | |
volatile uint32_t RxFilterWoLClear; | |
uint32_t RESERVED5; | |
volatile uint32_t HashFilterL; | |
volatile uint32_t HashFilterH; | |
uint32_t RESERVED6[882]; | |
volatile const uint32_t IntStatus; | |
volatile uint32_t IntEnable; | |
volatile uint32_t IntClear; | |
volatile uint32_t IntSet; | |
uint32_t RESERVED7; | |
volatile uint32_t PowerDown; | |
uint32_t RESERVED8; | |
volatile uint32_t Module_ID; | |
} |