#define __MPU_PRESENT 1
#define __NVIC_PRIO_BITS 5
#define __Vendor_SysTickConfig 0
#define LPC_FLASH_BASE 0x00000000UL
#define LPC_RAM_BASE 0x10000000UL
#define LPC_PERI_RAM_BASE 0x20000000UL
#define LPC_APB0_BASE 0x40000000UL
#define LPC_APB1_BASE 0x40080000UL
#define LPC_AHBRAM1_BASE 0x20004000UL
#define LPC_AHB_BASE 0x20080000UL
#define LPC_CM3_BASE 0xE0000000UL
#define LPC_WDT_BASE
#define LPC_TIM0_BASE
#define LPC_TIM1_BASE
#define LPC_UART0_BASE
#define LPC_UART1_BASE
#define LPC_PWM0_BASE
#define LPC_PWM1_BASE
#define LPC_I2C0_BASE
#define LPC_RTC_BASE
#define LPC_GPIOINT_BASE
#define LPC_IOCON_BASE
#define LPC_SSP1_BASE
#define LPC_ADC_BASE
#define LPC_CANAF_RAM_BASE
#define LPC_CANAF_BASE
#define LPC_CANCR_BASE
#define LPC_CAN1_BASE
#define LPC_CAN2_BASE
#define LPC_I2C1_BASE
#define LPC_SSP0_BASE
#define LPC_DAC_BASE
#define LPC_TIM2_BASE
#define LPC_TIM3_BASE
#define LPC_UART2_BASE
#define LPC_UART3_BASE
#define LPC_I2C2_BASE
#define LPC_UART4_BASE
#define LPC_I2S_BASE
#define LPC_SSP2_BASE
#define LPC_MCPWM_BASE
#define LPC_QEI_BASE
#define LPC_MCI_BASE
#define LPC_SC_BASE
#define LPC_GPDMA_BASE
#define LPC_GPDMACH0_BASE
#define LPC_GPDMACH1_BASE
#define LPC_GPDMACH2_BASE
#define LPC_GPDMACH3_BASE
#define LPC_GPDMACH4_BASE
#define LPC_GPDMACH5_BASE
#define LPC_GPDMACH6_BASE
#define LPC_GPDMACH7_BASE
#define LPC_EMAC_BASE
#define LPC_LCD_BASE
#define LPC_USB_BASE
#define LPC_CRC_BASE
#define LPC_GPIO0_BASE
#define LPC_GPIO1_BASE
#define LPC_GPIO2_BASE
#define LPC_GPIO3_BASE
#define LPC_GPIO4_BASE
#define LPC_GPIO5_BASE
#define LPC_EMC_BASE
#define LPC_EEPROM_BASE
#define LPC_SC
#define LPC_WDT
#define LPC_TIM0
#define LPC_TIM1
#define LPC_TIM2
#define LPC_TIM3
#define LPC_UART0
#define LPC_UART1
#define LPC_UART2
#define LPC_UART3
#define LPC_UART4
#define LPC_PWM0
#define LPC_PWM1
#define LPC_I2C0
#define LPC_I2C1
#define LPC_I2C2
#define LPC_I2S
#define LPC_RTC
#define LPC_GPIOINT
#define LPC_IOCON
#define LPC_SSP0
#define LPC_SSP1
#define LPC_SSP2
#define LPC_ADC
#define LPC_DAC
#define LPC_CANAF_RAM
#define LPC_CANAF
#define LPC_CANCR
#define LPC_CAN1
#define LPC_CAN2
#define LPC_MCPWM
#define LPC_QEI
#define LPC_MCI
#define LPC_GPDMA
#define LPC_GPDMACH0
#define LPC_GPDMACH1
#define LPC_GPDMACH2
#define LPC_GPDMACH3
#define LPC_GPDMACH4
#define LPC_GPDMACH5
#define LPC_GPDMACH6
#define LPC_GPDMACH7
#define LPC_EMAC
#define LPC_LCD
#define LPC_USB
#define LPC_GPIO0
#define LPC_GPIO1
#define LPC_GPIO2
#define LPC_GPIO3
#define LPC_GPIO4
#define LPC_GPIO5
#define LPC_EMC
#define LPC_CRC
#define LPC_EEPROM
enum IRQn | |
{ | |
NonMaskableInt_IRQn; | |
HardFault_IRQn; | |
MemoryManagement_IRQn; | |
BusFault_IRQn; | |
UsageFault_IRQn; | |
SVCall_IRQn; | |
DebugMonitor_IRQn; | |
PendSV_IRQn; | |
SysTick_IRQn; | |
WDT_IRQn; | |
TIMER0_IRQn; | |
TIMER1_IRQn; | |
TIMER2_IRQn; | |
TIMER3_IRQn; | |
UART0_IRQn; | |
UART1_IRQn; | |
UART2_IRQn; | |
UART3_IRQn; | |
PWM1_IRQn; | |
I2C0_IRQn; | |
I2C1_IRQn; | |
I2C2_IRQn; | |
Reserved0_IRQn; | |
SSP0_IRQn; | |
SSP1_IRQn; | |
PLL0_IRQn; | |
RTC_IRQn; | |
EINT0_IRQn; | |
EINT1_IRQn; | |
EINT2_IRQn; | |
EINT3_IRQn; | |
ADC_IRQn; | |
BOD_IRQn; | |
USB_IRQn; | |
CAN_IRQn; | |
DMA_IRQn; | |
I2S_IRQn; | |
ENET_IRQn; | |
MCI_IRQn; | |
MCPWM_IRQn; | |
QEI_IRQn; | |
PLL1_IRQn; | |
USBActivity_IRQn; | |
CANActivity_IRQn; | |
UART4_IRQn; | |
SSP2_IRQn; | |
LCD_IRQn; | |
GPIO_IRQn; | |
PWM0_IRQn; | |
EEPROM_IRQn; | |
IRQn_MAX; | |
} |
struct | |
{ | |
volatile uint32_t FLASHCFG; | |
uint32_t RESERVED0[31]; | |
volatile uint32_t PLL0CON; | |
volatile uint32_t PLL0CFG; | |
volatile const uint32_t PLL0STAT; | |
volatile uint32_t PLL0FEED; | |
uint32_t RESERVED1[4]; | |
volatile uint32_t PLL1CON; | |
volatile uint32_t PLL1CFG; | |
volatile const uint32_t PLL1STAT; | |
volatile uint32_t PLL1FEED; | |
uint32_t RESERVED2[4]; | |
volatile uint32_t PCON; | |
volatile uint32_t PCONP; | |
uint32_t RESERVED3[14]; | |
volatile uint32_t EMCCLKSEL; | |
volatile uint32_t CCLKSEL; | |
volatile uint32_t USBCLKSEL; | |
volatile uint32_t CLKSRCSEL; | |
volatile uint32_t CANSLEEPCLR; | |
volatile uint32_t CANWAKEFLAGS; | |
uint32_t RESERVED4[10]; | |
volatile uint32_t EXTINT; | |
uint32_t RESERVED5[1]; | |
volatile uint32_t EXTMODE; | |
volatile uint32_t EXTPOLAR; | |
uint32_t RESERVED6[12]; | |
volatile uint32_t RSID; | |
uint32_t RESERVED7[7]; | |
volatile uint32_t SCS; | |
volatile uint32_t IRCTRIM; | |
volatile uint32_t PCLKSEL; | |
uint32_t RESERVED8; | |
volatile uint32_t PBOOST; | |
uint32_t RESERVED9; | |
volatile uint32_t LCD_CFG; | |
uint32_t RESERVED10[1]; | |
volatile uint32_t USBIntSt; | |
volatile uint32_t DMAREQSEL; | |
volatile uint32_t CLKOUTCFG; | |
volatile uint32_t RSTCON0; | |
volatile uint32_t RSTCON1; | |
uint32_t RESERVED11[2]; | |
volatile uint32_t EMCDLYCTL; | |
volatile uint32_t EMCCAL; | |
} |
struct | |
{ | |
volatile uint32_t P0_0; | |
volatile uint32_t P0_1; | |
volatile uint32_t P0_2; | |
volatile uint32_t P0_3; | |
volatile uint32_t P0_4; | |
volatile uint32_t P0_5; | |
volatile uint32_t P0_6; | |
volatile uint32_t P0_7; | |
volatile uint32_t P0_8; | |
volatile uint32_t P0_9; | |
volatile uint32_t P0_10; | |
volatile uint32_t P0_11; | |
volatile uint32_t P0_12; | |
volatile uint32_t P0_13; | |
volatile uint32_t P0_14; | |
volatile uint32_t P0_15; | |
volatile uint32_t P0_16; | |
volatile uint32_t P0_17; | |
volatile uint32_t P0_18; | |
volatile uint32_t P0_19; | |
volatile uint32_t P0_20; | |
volatile uint32_t P0_21; | |
volatile uint32_t P0_22; | |
volatile uint32_t P0_23; | |
volatile uint32_t P0_24; | |
volatile uint32_t P0_25; | |
volatile uint32_t P0_26; | |
volatile uint32_t P0_27; | |
volatile uint32_t P0_28; | |
volatile uint32_t P0_29; | |
volatile uint32_t P0_30; | |
volatile uint32_t P0_31; | |
volatile uint32_t P1_0; | |
volatile uint32_t P1_1; | |
volatile uint32_t P1_2; | |
volatile uint32_t P1_3; | |
volatile uint32_t P1_4; | |
volatile uint32_t P1_5; | |
volatile uint32_t P1_6; | |
volatile uint32_t P1_7; | |
volatile uint32_t P1_8; | |
volatile uint32_t P1_9; | |
volatile uint32_t P1_10; | |
volatile uint32_t P1_11; | |
volatile uint32_t P1_12; | |
volatile uint32_t P1_13; | |
volatile uint32_t P1_14; | |
volatile uint32_t P1_15; | |
volatile uint32_t P1_16; | |
volatile uint32_t P1_17; | |
volatile uint32_t P1_18; | |
volatile uint32_t P1_19; | |
volatile uint32_t P1_20; | |
volatile uint32_t P1_21; | |
volatile uint32_t P1_22; | |
volatile uint32_t P1_23; | |
volatile uint32_t P1_24; | |
volatile uint32_t P1_25; | |
volatile uint32_t P1_26; | |
volatile uint32_t P1_27; | |
volatile uint32_t P1_28; | |
volatile uint32_t P1_29; | |
volatile uint32_t P1_30; | |
volatile uint32_t P1_31; | |
volatile uint32_t P2_0; | |
volatile uint32_t P2_1; | |
volatile uint32_t P2_2; | |
volatile uint32_t P2_3; | |
volatile uint32_t P2_4; | |
volatile uint32_t P2_5; | |
volatile uint32_t P2_6; | |
volatile uint32_t P2_7; | |
volatile uint32_t P2_8; | |
volatile uint32_t P2_9; | |
volatile uint32_t P2_10; | |
volatile uint32_t P2_11; | |
volatile uint32_t P2_12; | |
volatile uint32_t P2_13; | |
volatile uint32_t P2_14; | |
volatile uint32_t P2_15; | |
volatile uint32_t P2_16; | |
volatile uint32_t P2_17; | |
volatile uint32_t P2_18; | |
volatile uint32_t P2_19; | |
volatile uint32_t P2_20; | |
volatile uint32_t P2_21; | |
volatile uint32_t P2_22; | |
volatile uint32_t P2_23; | |
volatile uint32_t P2_24; | |
volatile uint32_t P2_25; | |
volatile uint32_t P2_26; | |
volatile uint32_t P2_27; | |
volatile uint32_t P2_28; | |
volatile uint32_t P2_29; | |
volatile uint32_t P2_30; | |
volatile uint32_t P2_31; | |
volatile uint32_t P3_0; | |
volatile uint32_t P3_1; | |
volatile uint32_t P3_2; | |
volatile uint32_t P3_3; | |
volatile uint32_t P3_4; | |
volatile uint32_t P3_5; | |
volatile uint32_t P3_6; | |
volatile uint32_t P3_7; | |
volatile uint32_t P3_8; | |
volatile uint32_t P3_9; | |
volatile uint32_t P3_10; | |
volatile uint32_t P3_11; | |
volatile uint32_t P3_12; | |
volatile uint32_t P3_13; | |
volatile uint32_t P3_14; | |
volatile uint32_t P3_15; | |
volatile uint32_t P3_16; | |
volatile uint32_t P3_17; | |
volatile uint32_t P3_18; | |
volatile uint32_t P3_19; | |
volatile uint32_t P3_20; | |
volatile uint32_t P3_21; | |
volatile uint32_t P3_22; | |
volatile uint32_t P3_23; | |
volatile uint32_t P3_24; | |
volatile uint32_t P3_25; | |
volatile uint32_t P3_26; | |
volatile uint32_t P3_27; | |
volatile uint32_t P3_28; | |
volatile uint32_t P3_29; | |
volatile uint32_t P3_30; | |
volatile uint32_t P3_31; | |
volatile uint32_t P4_0; | |
volatile uint32_t P4_1; | |
volatile uint32_t P4_2; | |
volatile uint32_t P4_3; | |
volatile uint32_t P4_4; | |
volatile uint32_t P4_5; | |
volatile uint32_t P4_6; | |
volatile uint32_t P4_7; | |
volatile uint32_t P4_8; | |
volatile uint32_t P4_9; | |
volatile uint32_t P4_10; | |
volatile uint32_t P4_11; | |
volatile uint32_t P4_12; | |
volatile uint32_t P4_13; | |
volatile uint32_t P4_14; | |
volatile uint32_t P4_15; | |
volatile uint32_t P4_16; | |
volatile uint32_t P4_17; | |
volatile uint32_t P4_18; | |
volatile uint32_t P4_19; | |
volatile uint32_t P4_20; | |
volatile uint32_t P4_21; | |
volatile uint32_t P4_22; | |
volatile uint32_t P4_23; | |
volatile uint32_t P4_24; | |
volatile uint32_t P4_25; | |
volatile uint32_t P4_26; | |
volatile uint32_t P4_27; | |
volatile uint32_t P4_28; | |
volatile uint32_t P4_29; | |
volatile uint32_t P4_30; | |
volatile uint32_t P4_31; | |
volatile uint32_t P5_0; | |
volatile uint32_t P5_1; | |
volatile uint32_t P5_2; | |
volatile uint32_t P5_3; | |
volatile uint32_t P5_4; | |
} |
struct | |
{ | |
volatile uint32_t FIODIR; | |
uint32_t RESERVED0[3]; | |
volatile uint32_t FIOMASK; | |
volatile uint32_t FIOPIN; | |
volatile uint32_t FIOSET; | |
volatile uint32_t FIOCLR; | |
} |
struct | |
{ | |
volatile const uint32_t IntStatus; | |
volatile const uint32_t IO0IntStatR; | |
volatile const uint32_t IO0IntStatF; | |
volatile uint32_t IO0IntClr; | |
volatile uint32_t IO0IntEnR; | |
volatile uint32_t IO0IntEnF; | |
uint32_t RESERVED0[3]; | |
volatile const uint32_t IO2IntStatR; | |
volatile const uint32_t IO2IntStatF; | |
volatile uint32_t IO2IntClr; | |
volatile uint32_t IO2IntEnR; | |
volatile uint32_t IO2IntEnF; | |
} |
struct | |
{ | |
volatile uint32_t IR; | |
volatile uint32_t TCR; | |
volatile uint32_t TC; | |
volatile uint32_t PR; | |
volatile uint32_t PC; | |
volatile uint32_t MCR; | |
volatile uint32_t MR0; | |
volatile uint32_t MR1; | |
volatile uint32_t MR2; | |
volatile uint32_t MR3; | |
volatile uint32_t CCR; | |
volatile const uint32_t CR0; | |
volatile const uint32_t CR1; | |
uint32_t RESERVED0[2]; | |
volatile uint32_t EMR; | |
uint32_t RESERVED1[12]; | |
volatile uint32_t CTCR; | |
} |
struct | |
{ | |
volatile uint32_t IR; | |
volatile uint32_t TCR; | |
volatile uint32_t TC; | |
volatile uint32_t PR; | |
volatile uint32_t PC; | |
volatile uint32_t MCR; | |
volatile uint32_t MR0; | |
volatile uint32_t MR1; | |
volatile uint32_t MR2; | |
volatile uint32_t MR3; | |
volatile uint32_t CCR; | |
volatile const uint32_t CR0; | |
volatile const uint32_t CR1; | |
volatile const uint32_t CR2; | |
volatile const uint32_t CR3; | |
uint32_t RESERVED0; | |
volatile uint32_t MR4; | |
volatile uint32_t MR5; | |
volatile uint32_t MR6; | |
volatile uint32_t PCR; | |
volatile uint32_t LER; | |
uint32_t RESERVED1[7]; | |
volatile uint32_t CTCR; | |
} |
struct | |
{ | |
union | |
{ | |
volatile const uint8_t RBR; | |
volatile uint8_t THR; | |
volatile uint8_t DLL; | |
uint32_t RESERVED0; | |
} | |
; | |
union | |
{ | |
volatile uint8_t DLM; | |
volatile uint32_t IER; | |
} | |
; | |
union | |
{ | |
volatile const uint32_t IIR; | |
volatile uint8_t FCR; | |
} | |
; | |
volatile uint8_t LCR; | |
uint8_t RESERVED1[7]; | |
volatile const uint8_t LSR; | |
uint8_t RESERVED2[7]; | |
volatile uint8_t SCR; | |
uint8_t RESERVED3[3]; | |
volatile uint32_t ACR; | |
uint8_t RESERVED4[4]; | |
volatile uint8_t FDR; | |
uint8_t RESERVED5[7]; | |
volatile uint8_t TER; | |
uint8_t RESERVED8[27]; | |
volatile uint8_t RS485CTRL; | |
uint8_t RESERVED9[3]; | |
volatile uint8_t ADRMATCH; | |
uint8_t RESERVED10[3]; | |
volatile uint8_t RS485DLY; | |
uint8_t RESERVED11[3]; | |
} |
struct | |
{ | |
union | |
{ | |
volatile const uint8_t RBR; | |
volatile uint8_t THR; | |
volatile uint8_t DLL; | |
uint32_t RESERVED0; | |
} | |
; | |
union | |
{ | |
volatile uint8_t DLM; | |
volatile uint32_t IER; | |
} | |
; | |
union | |
{ | |
volatile const uint32_t IIR; | |
volatile uint8_t FCR; | |
} | |
; | |
volatile uint8_t LCR; | |
uint8_t RESERVED1[3]; | |
volatile uint8_t MCR; | |
uint8_t RESERVED2[3]; | |
volatile const uint8_t LSR; | |
uint8_t RESERVED3[3]; | |
volatile const uint8_t MSR; | |
uint8_t RESERVED4[3]; | |
volatile uint8_t SCR; | |
uint8_t RESERVED5[3]; | |
volatile uint32_t ACR; | |
uint32_t RESERVED6; | |
volatile uint32_t FDR; | |
uint32_t RESERVED7; | |
volatile uint8_t TER; | |
uint8_t RESERVED8[27]; | |
volatile uint8_t RS485CTRL; | |
uint8_t RESERVED9[3]; | |
volatile uint8_t ADRMATCH; | |
uint8_t RESERVED10[3]; | |
volatile uint8_t RS485DLY; | |
uint8_t RESERVED11[3]; | |
} |
struct | |
{ | |
union | |
{ | |
volatile const uint32_t RBR; | |
volatile uint32_t THR; | |
volatile uint32_t DLL; | |
} | |
; | |
union | |
{ | |
volatile uint32_t DLM; | |
volatile uint32_t IER; | |
} | |
; | |
union | |
{ | |
volatile const uint32_t IIR; | |
volatile uint32_t FCR; | |
} | |
; | |
volatile uint32_t LCR; | |
volatile uint32_t MCR; | |
volatile const uint32_t LSR; | |
volatile const uint32_t MSR; | |
volatile uint32_t SCR; | |
volatile uint32_t ACR; | |
volatile uint32_t ICR; | |
volatile uint32_t FDR; | |
volatile uint32_t OSR; | |
uint32_t RESERVED0[6]; | |
volatile uint32_t SCI_CTRL; | |
volatile uint32_t RS485CTRL; | |
volatile uint32_t ADRMATCH; | |
volatile uint32_t RS485DLY; | |
volatile uint32_t SYNCCTRL; | |
volatile uint32_t TER; | |
} |
struct | |
{ | |
volatile uint32_t CR0; | |
volatile uint32_t CR1; | |
volatile uint32_t DR; | |
volatile const uint32_t SR; | |
volatile uint32_t CPSR; | |
volatile uint32_t IMSC; | |
volatile uint32_t RIS; | |
volatile uint32_t MIS; | |
volatile uint32_t ICR; | |
volatile uint32_t DMACR; | |
} |
struct | |
{ | |
volatile uint32_t CONSET; | |
volatile const uint32_t STAT; | |
volatile uint32_t DAT; | |
volatile uint32_t ADR0; | |
volatile uint32_t SCLH; | |
volatile uint32_t SCLL; | |
volatile uint32_t CONCLR; | |
volatile uint32_t MMCTRL; | |
volatile uint32_t ADR1; | |
volatile uint32_t ADR2; | |
volatile uint32_t ADR3; | |
volatile const uint32_t DATA_BUFFER; | |
volatile uint32_t MASK0; | |
volatile uint32_t MASK1; | |
volatile uint32_t MASK2; | |
volatile uint32_t MASK3; | |
} |
struct | |
{ | |
volatile uint32_t DAO; | |
volatile uint32_t DAI; | |
volatile uint32_t TXFIFO; | |
volatile const uint32_t RXFIFO; | |
volatile const uint32_t STATE; | |
volatile uint32_t DMA1; | |
volatile uint32_t DMA2; | |
volatile uint32_t IRQ; | |
volatile uint32_t TXRATE; | |
volatile uint32_t RXRATE; | |
volatile uint32_t TXBITRATE; | |
volatile uint32_t RXBITRATE; | |
volatile uint32_t TXMODE; | |
volatile uint32_t RXMODE; | |
} |
struct | |
{ | |
volatile uint8_t ILR; | |
uint8_t RESERVED0[7]; | |
volatile uint8_t CCR; | |
uint8_t RESERVED1[3]; | |
volatile uint8_t CIIR; | |
uint8_t RESERVED2[3]; | |
volatile uint8_t AMR; | |
uint8_t RESERVED3[3]; | |
volatile const uint32_t CTIME0; | |
volatile const uint32_t CTIME1; | |
volatile const uint32_t CTIME2; | |
volatile uint8_t SEC; | |
uint8_t RESERVED4[3]; | |
volatile uint8_t MIN; | |
uint8_t RESERVED5[3]; | |
volatile uint8_t HOUR; | |
uint8_t RESERVED6[3]; | |
volatile uint8_t DOM; | |
uint8_t RESERVED7[3]; | |
volatile uint8_t DOW; | |
uint8_t RESERVED8[3]; | |
volatile uint16_t DOY; | |
uint16_t RESERVED9; | |
volatile uint8_t MONTH; | |
uint8_t RESERVED10[3]; | |
volatile uint16_t YEAR; | |
uint16_t RESERVED11; | |
volatile uint32_t CALIBRATION; | |
volatile uint32_t GPREG0; | |
volatile uint32_t GPREG1; | |
volatile uint32_t GPREG2; | |
volatile uint32_t GPREG3; | |
volatile uint32_t GPREG4; | |
volatile uint8_t RTC_AUXEN; | |
uint8_t RESERVED12[3]; | |
volatile uint8_t RTC_AUX; | |
uint8_t RESERVED13[3]; | |
volatile uint8_t ALSEC; | |
uint8_t RESERVED14[3]; | |
volatile uint8_t ALMIN; | |
uint8_t RESERVED15[3]; | |
volatile uint8_t ALHOUR; | |
uint8_t RESERVED16[3]; | |
volatile uint8_t ALDOM; | |
uint8_t RESERVED17[3]; | |
volatile uint8_t ALDOW; | |
uint8_t RESERVED18[3]; | |
volatile uint16_t ALDOY; | |
uint16_t RESERVED19; | |
volatile uint8_t ALMON; | |
uint8_t RESERVED20[3]; | |
volatile uint16_t ALYEAR; | |
uint16_t RESERVED21; | |
volatile uint32_t ERSTATUS; | |
volatile uint32_t ERCONTROL; | |
volatile uint32_t ERCOUNTERS; | |
uint32_t RESERVED22; | |
volatile uint32_t ERFIRSTSTAMP0; | |
volatile uint32_t ERFIRSTSTAMP1; | |
volatile uint32_t ERFIRSTSTAMP2; | |
uint32_t RESERVED23; | |
volatile uint32_t ERLASTSTAMP0; | |
volatile uint32_t ERLASTSTAMP1; | |
volatile uint32_t ERLASTSTAMP2; | |
} |
struct | |
{ | |
volatile uint8_t MOD; | |
uint8_t RESERVED0[3]; | |
volatile uint32_t TC; | |
volatile uint8_t FEED; | |
uint8_t RESERVED1[3]; | |
volatile const uint32_t TV; | |
uint32_t RESERVED2; | |
volatile uint32_t WARNINT; | |
volatile uint32_t WINDOW; | |
} |
struct | |
{ | |
volatile uint32_t CR; | |
volatile uint32_t GDR; | |
uint32_t RESERVED0; | |
volatile uint32_t INTEN; | |
volatile uint32_t DR[8]; | |
volatile const uint32_t STAT; | |
volatile uint32_t ADTRM; | |
} |
struct | |
{ | |
volatile uint32_t CR; | |
volatile uint32_t CTRL; | |
volatile uint32_t CNTVAL; | |
} |
struct | |
{ | |
volatile const uint32_t CON; | |
volatile uint32_t CON_SET; | |
volatile uint32_t CON_CLR; | |
volatile const uint32_t CAPCON; | |
volatile uint32_t CAPCON_SET; | |
volatile uint32_t CAPCON_CLR; | |
volatile uint32_t TC0; | |
volatile uint32_t TC1; | |
volatile uint32_t TC2; | |
volatile uint32_t LIM0; | |
volatile uint32_t LIM1; | |
volatile uint32_t LIM2; | |
volatile uint32_t MAT0; | |
volatile uint32_t MAT1; | |
volatile uint32_t MAT2; | |
volatile uint32_t DT; | |
volatile uint32_t CP; | |
volatile uint32_t CAP0; | |
volatile uint32_t CAP1; | |
volatile uint32_t CAP2; | |
volatile const uint32_t INTEN; | |
volatile uint32_t INTEN_SET; | |
volatile uint32_t INTEN_CLR; | |
volatile const uint32_t CNTCON; | |
volatile uint32_t CNTCON_SET; | |
volatile uint32_t CNTCON_CLR; | |
volatile const uint32_t INTF; | |
volatile uint32_t INTF_SET; | |
volatile uint32_t INTF_CLR; | |
volatile uint32_t CAP_CLR; | |
} |
struct | |
{ | |
volatile uint32_t CON; | |
volatile const uint32_t STAT; | |
volatile uint32_t CONF; | |
volatile const uint32_t POS; | |
volatile uint32_t MAXPOS; | |
volatile uint32_t CMPOS0; | |
volatile uint32_t CMPOS1; | |
volatile uint32_t CMPOS2; | |
volatile const uint32_t INXCNT; | |
volatile uint32_t INXCMP0; | |
volatile uint32_t LOAD; | |
volatile const uint32_t TIME; | |
volatile const uint32_t VEL; | |
volatile const uint32_t CAP; | |
volatile uint32_t VELCOMP; | |
volatile uint32_t FILTERPHA; | |
volatile uint32_t FILTERPHB; | |
volatile uint32_t FILTERINX; | |
volatile uint32_t WINDOW; | |
volatile uint32_t INXCMP1; | |
volatile uint32_t INXCMP2; | |
uint32_t RESERVED0[993]; | |
volatile uint32_t IEC; | |
volatile uint32_t IES; | |
volatile const uint32_t INTSTAT; | |
volatile const uint32_t IE; | |
volatile uint32_t CLR; | |
volatile uint32_t SET; | |
} |
struct | |
{ | |
volatile uint32_t POWER; | |
volatile uint32_t CLOCK; | |
volatile uint32_t ARGUMENT; | |
volatile uint32_t COMMAND; | |
volatile const uint32_t RESP_CMD; | |
volatile const uint32_t RESP0; | |
volatile const uint32_t RESP1; | |
volatile const uint32_t RESP2; | |
volatile const uint32_t RESP3; | |
volatile uint32_t DATATMR; | |
volatile uint32_t DATALEN; | |
volatile uint32_t DATACTRL; | |
volatile const uint32_t DATACNT; | |
volatile const uint32_t STATUS; | |
volatile uint32_t CLEAR; | |
volatile uint32_t MASK0; | |
uint32_t RESERVED0[2]; | |
volatile const uint32_t FIFOCNT; | |
uint32_t RESERVED1[13]; | |
volatile uint32_t FIFO[16]; | |
} |
struct | |
{ | |
volatile uint32_t mask[512]; | |
} |
struct | |
{ | |
volatile uint32_t AFMR; | |
volatile uint32_t SFF_sa; | |
volatile uint32_t SFF_GRP_sa; | |
volatile uint32_t EFF_sa; | |
volatile uint32_t EFF_GRP_sa; | |
volatile uint32_t ENDofTable; | |
volatile const uint32_t LUTerrAd; | |
volatile const uint32_t LUTerr; | |
volatile uint32_t FCANIE; | |
volatile uint32_t FCANIC0; | |
volatile uint32_t FCANIC1; | |
} |
struct | |
{ | |
volatile const uint32_t TxSR; | |
volatile const uint32_t RxSR; | |
volatile const uint32_t MSR; | |
} |
struct | |
{ | |
volatile uint32_t MOD; | |
volatile uint32_t CMR; | |
volatile uint32_t GSR; | |
volatile const uint32_t ICR; | |
volatile uint32_t IER; | |
volatile uint32_t BTR; | |
volatile uint32_t EWL; | |
volatile const uint32_t SR; | |
volatile uint32_t RFS; | |
volatile uint32_t RID; | |
volatile uint32_t RDA; | |
volatile uint32_t RDB; | |
volatile uint32_t TFI1; | |
volatile uint32_t TID1; | |
volatile uint32_t TDA1; | |
volatile uint32_t TDB1; | |
volatile uint32_t TFI2; | |
volatile uint32_t TID2; | |
volatile uint32_t TDA2; | |
volatile uint32_t TDB2; | |
volatile uint32_t TFI3; | |
volatile uint32_t TID3; | |
volatile uint32_t TDA3; | |
volatile uint32_t TDB3; | |
} |
struct | |
{ | |
volatile const uint32_t IntStat; | |
volatile const uint32_t IntTCStat; | |
volatile uint32_t IntTCClear; | |
volatile const uint32_t IntErrStat; | |
volatile uint32_t IntErrClr; | |
volatile const uint32_t RawIntTCStat; | |
volatile const uint32_t RawIntErrStat; | |
volatile const uint32_t EnbldChns; | |
volatile uint32_t SoftBReq; | |
volatile uint32_t SoftSReq; | |
volatile uint32_t SoftLBReq; | |
volatile uint32_t SoftLSReq; | |
volatile uint32_t Config; | |
volatile uint32_t Sync; | |
} |
struct | |
{ | |
volatile uint32_t CSrcAddr; | |
volatile uint32_t CDestAddr; | |
volatile uint32_t CLLI; | |
volatile uint32_t CControl; | |
volatile uint32_t CConfig; | |
} |
struct | |
{ | |
volatile const uint32_t Revision; | |
volatile uint32_t Control; | |
volatile uint32_t CommandStatus; | |
volatile uint32_t InterruptStatus; | |
volatile uint32_t InterruptEnable; | |
volatile uint32_t InterruptDisable; | |
volatile uint32_t HCCA; | |
volatile const uint32_t PeriodCurrentED; | |
volatile uint32_t ControlHeadED; | |
volatile uint32_t ControlCurrentED; | |
volatile uint32_t BulkHeadED; | |
volatile uint32_t BulkCurrentED; | |
volatile const uint32_t DoneHead; | |
volatile uint32_t FmInterval; | |
volatile const uint32_t FmRemaining; | |
volatile const uint32_t FmNumber; | |
volatile uint32_t PeriodicStart; | |
volatile uint32_t LSTreshold; | |
volatile uint32_t RhDescriptorA; | |
volatile uint32_t RhDescriptorB; | |
volatile uint32_t RhStatus; | |
volatile uint32_t RhPortStatus1; | |
volatile uint32_t RhPortStatus2; | |
uint32_t RESERVED0[40]; | |
volatile const uint32_t Module_ID; | |
volatile const uint32_t IntSt; | |
volatile uint32_t IntEn; | |
volatile uint32_t IntSet; | |
volatile uint32_t IntClr; | |
volatile uint32_t StCtrl; | |
volatile uint32_t Tmr; | |
uint32_t RESERVED1[58]; | |
volatile const uint32_t DevIntSt; | |
volatile uint32_t DevIntEn; | |
volatile uint32_t DevIntClr; | |
volatile uint32_t DevIntSet; | |
volatile uint32_t CmdCode; | |
volatile const uint32_t CmdData; | |
volatile const uint32_t RxData; | |
volatile uint32_t TxData; | |
volatile const uint32_t RxPLen; | |
volatile uint32_t TxPLen; | |
volatile uint32_t Ctrl; | |
volatile uint32_t DevIntPri; | |
volatile const uint32_t EpIntSt; | |
volatile uint32_t EpIntEn; | |
volatile uint32_t EpIntClr; | |
volatile uint32_t EpIntSet; | |
volatile uint32_t EpIntPri; | |
volatile uint32_t ReEp; | |
volatile uint32_t EpInd; | |
volatile uint32_t MaxPSize; | |
volatile const uint32_t DMARSt; | |
volatile uint32_t DMARClr; | |
volatile uint32_t DMARSet; | |
uint32_t RESERVED2[9]; | |
volatile uint32_t UDCAH; | |
volatile const uint32_t EpDMASt; | |
volatile uint32_t EpDMAEn; | |
volatile uint32_t EpDMADis; | |
volatile const uint32_t DMAIntSt; | |
volatile uint32_t DMAIntEn; | |
uint32_t RESERVED3[2]; | |
volatile const uint32_t EoTIntSt; | |
volatile uint32_t EoTIntClr; | |
volatile uint32_t EoTIntSet; | |
volatile const uint32_t NDDRIntSt; | |
volatile uint32_t NDDRIntClr; | |
volatile uint32_t NDDRIntSet; | |
volatile const uint32_t SysErrIntSt; | |
volatile uint32_t SysErrIntClr; | |
volatile uint32_t SysErrIntSet; | |
uint32_t RESERVED4[15]; | |
union | |
{ | |
volatile const uint32_t I2C_RX; | |
volatile uint32_t I2C_TX; | |
} | |
; | |
volatile uint32_t I2C_STS; | |
volatile uint32_t I2C_CTL; | |
volatile uint32_t I2C_CLKHI; | |
volatile uint32_t I2C_CLKLO; | |
uint32_t RESERVED5[824]; | |
union | |
{ | |
volatile uint32_t USBClkCtrl; | |
volatile uint32_t OTGClkCtrl; | |
} | |
; | |
union | |
{ | |
volatile const uint32_t USBClkSt; | |
volatile const uint32_t OTGClkSt; | |
} | |
; | |
} |
struct | |
{ | |
volatile uint32_t MAC1; | |
volatile uint32_t MAC2; | |
volatile uint32_t IPGT; | |
volatile uint32_t IPGR; | |
volatile uint32_t CLRT; | |
volatile uint32_t MAXF; | |
volatile uint32_t SUPP; | |
volatile uint32_t TEST; | |
volatile uint32_t MCFG; | |
volatile uint32_t MCMD; | |
volatile uint32_t MADR; | |
volatile uint32_t MWTD; | |
volatile const uint32_t MRDD; | |
volatile const uint32_t MIND; | |
uint32_t RESERVED0[2]; | |
volatile uint32_t SA0; | |
volatile uint32_t SA1; | |
volatile uint32_t SA2; | |
uint32_t RESERVED1[45]; | |
volatile uint32_t Command; | |
volatile const uint32_t Status; | |
volatile uint32_t RxDescriptor; | |
volatile uint32_t RxStatus; | |
volatile uint32_t RxDescriptorNumber; | |
volatile const uint32_t RxProduceIndex; | |
volatile uint32_t RxConsumeIndex; | |
volatile uint32_t TxDescriptor; | |
volatile uint32_t TxStatus; | |
volatile uint32_t TxDescriptorNumber; | |
volatile uint32_t TxProduceIndex; | |
volatile const uint32_t TxConsumeIndex; | |
uint32_t RESERVED2[10]; | |
volatile const uint32_t TSV0; | |
volatile const uint32_t TSV1; | |
volatile const uint32_t RSV; | |
uint32_t RESERVED3[3]; | |
volatile uint32_t FlowControlCounter; | |
volatile const uint32_t FlowControlStatus; | |
uint32_t RESERVED4[34]; | |
volatile uint32_t RxFilterCtrl; | |
volatile const uint32_t RxFilterWoLStatus; | |
volatile uint32_t RxFilterWoLClear; | |
uint32_t RESERVED5; | |
volatile uint32_t HashFilterL; | |
volatile uint32_t HashFilterH; | |
uint32_t RESERVED6[882]; | |
volatile const uint32_t IntStatus; | |
volatile uint32_t IntEnable; | |
volatile uint32_t IntClear; | |
volatile uint32_t IntSet; | |
uint32_t RESERVED7; | |
volatile uint32_t PowerDown; | |
uint32_t RESERVED8; | |
volatile uint32_t Module_ID; | |
} |
struct | |
{ | |
volatile uint32_t TIMH; | |
volatile uint32_t TIMV; | |
volatile uint32_t POL; | |
volatile uint32_t LE; | |
volatile uint32_t UPBASE; | |
volatile uint32_t LPBASE; | |
volatile uint32_t CTRL; | |
volatile uint32_t INTMSK; | |
volatile const uint32_t INTRAW; | |
volatile const uint32_t INTSTAT; | |
volatile uint32_t INTCLR; | |
volatile const uint32_t UPCURR; | |
volatile const uint32_t LPCURR; | |
uint32_t RESERVED0[115]; | |
volatile uint32_t PAL[128]; | |
uint32_t RESERVED1[256]; | |
volatile uint32_t CRSR_IMG[256]; | |
volatile uint32_t CRSR_CTRL; | |
volatile uint32_t CRSR_CFG; | |
volatile uint32_t CRSR_PAL0; | |
volatile uint32_t CRSR_PAL1; | |
volatile uint32_t CRSR_XY; | |
volatile uint32_t CRSR_CLIP; | |
uint32_t RESERVED2[2]; | |
volatile uint32_t CRSR_INTMSK; | |
volatile uint32_t CRSR_INTCLR; | |
volatile const uint32_t CRSR_INTRAW; | |
volatile const uint32_t CRSR_INTSTAT; | |
} |
struct | |
{ | |
volatile uint32_t Control; | |
volatile const uint32_t Status; | |
volatile uint32_t Config; | |
uint32_t RESERVED0[5]; | |
volatile uint32_t DynamicControl; | |
volatile uint32_t DynamicRefresh; | |
volatile uint32_t DynamicReadConfig; | |
uint32_t RESERVED1[1]; | |
volatile uint32_t DynamicRP; | |
volatile uint32_t DynamicRAS; | |
volatile uint32_t DynamicSREX; | |
volatile uint32_t DynamicAPR; | |
volatile uint32_t DynamicDAL; | |
volatile uint32_t DynamicWR; | |
volatile uint32_t DynamicRC; | |
volatile uint32_t DynamicRFC; | |
volatile uint32_t DynamicXSR; | |
volatile uint32_t DynamicRRD; | |
volatile uint32_t DynamicMRD; | |
uint32_t RESERVED2[9]; | |
volatile uint32_t StaticExtendedWait; | |
uint32_t RESERVED3[31]; | |
volatile uint32_t DynamicConfig0; | |
volatile uint32_t DynamicRasCas0; | |
uint32_t RESERVED4[6]; | |
volatile uint32_t DynamicConfig1; | |
volatile uint32_t DynamicRasCas1; | |
uint32_t RESERVED5[6]; | |
volatile uint32_t DynamicConfig2; | |
volatile uint32_t DynamicRasCas2; | |
uint32_t RESERVED6[6]; | |
volatile uint32_t DynamicConfig3; | |
volatile uint32_t DynamicRasCas3; | |
uint32_t RESERVED7[38]; | |
volatile uint32_t StaticConfig0; | |
volatile uint32_t StaticWaitWen0; | |
volatile uint32_t StaticWaitOen0; | |
volatile uint32_t StaticWaitRd0; | |
volatile uint32_t StaticWaitPage0; | |
volatile uint32_t StaticWaitWr0; | |
volatile uint32_t StaticWaitTurn0; | |
uint32_t RESERVED8[1]; | |
volatile uint32_t StaticConfig1; | |
volatile uint32_t StaticWaitWen1; | |
volatile uint32_t StaticWaitOen1; | |
volatile uint32_t StaticWaitRd1; | |
volatile uint32_t StaticWaitPage1; | |
volatile uint32_t StaticWaitWr1; | |
volatile uint32_t StaticWaitTurn1; | |
uint32_t RESERVED9[1]; | |
volatile uint32_t StaticConfig2; | |
volatile uint32_t StaticWaitWen2; | |
volatile uint32_t StaticWaitOen2; | |
volatile uint32_t StaticWaitRd2; | |
volatile uint32_t StaticWaitPage2; | |
volatile uint32_t StaticWaitWr2; | |
volatile uint32_t StaticWaitTurn2; | |
uint32_t RESERVED10[1]; | |
volatile uint32_t StaticConfig3; | |
volatile uint32_t StaticWaitWen3; | |
volatile uint32_t StaticWaitOen3; | |
volatile uint32_t StaticWaitRd3; | |
volatile uint32_t StaticWaitPage3; | |
volatile uint32_t StaticWaitWr3; | |
volatile uint32_t StaticWaitTurn3; | |
} |
struct | |
{ | |
volatile uint32_t MODE; | |
volatile uint32_t SEED; | |
union | |
{ | |
volatile const uint32_t SUM; | |
struct | |
{ | |
volatile uint32_t DATA; | |
} | |
WR_DATA_DWORD; | |
struct | |
{ | |
volatile uint16_t DATA; | |
uint16_t RESERVED; | |
} | |
WR_DATA_WORD; | |
struct | |
{ | |
volatile uint8_t DATA; | |
uint8_t RESERVED[3]; | |
} | |
WR_DATA_BYTE; | |
} | |
; | |
} |
struct | |
{ | |
volatile uint32_t CMD; | |
volatile uint32_t ADDR; | |
volatile uint32_t WDATA; | |
volatile uint32_t RDATA; | |
volatile uint32_t WSTATE; | |
volatile uint32_t CLKDIV; | |
volatile uint32_t PWRDWN; | |
uint32_t RESERVED0[975]; | |
volatile uint32_t INT_CLR_ENABLE; | |
volatile uint32_t INT_SET_ENABLE; | |
volatile uint32_t INT_STATUS; | |
volatile uint32_t INT_ENABLE; | |
volatile uint32_t INT_CLR_STATUS; | |
volatile uint32_t INT_SET_STATUS; | |
} |