#define LPC_FLASH_BASE 0x00000000
#define LPC_RAM_BASE 0x10000000
#define LPC_GPIO_BASE 0x2009C000
#define LPC_APB0_BASE 0x40000000
#define LPC_APB1_BASE 0x40080000
#define LPC_AHB_BASE 0x50000000
#define LPC_CM3_BASE 0xE0000000
#define LPC_WDT_BASE
#define LPC_TIM0_BASE
#define LPC_TIM1_BASE
#define LPC_UART0_BASE
#define LPC_UART1_BASE
#define LPC_PWM1_BASE
#define LPC_I2C0_BASE
#define LPC_SPI_BASE
#define LPC_RTC_BASE
#define LPC_GPIOINT_BASE
#define LPC_PINCON_BASE
#define LPC_SSP1_BASE
#define LPC_ADC_BASE
#define LPC_CANAF_RAM_BASE
#define LPC_CANAF_BASE
#define LPC_CANCR_BASE
#define LPC_CAN1_BASE
#define LPC_CAN2_BASE
#define LPC_I2C1_BASE
#define LPC_SSP0_BASE
#define LPC_DAC_BASE
#define LPC_TIM2_BASE
#define LPC_TIM3_BASE
#define LPC_UART2_BASE
#define LPC_UART3_BASE
#define LPC_I2C2_BASE
#define LPC_I2S_BASE
#define LPC_RIT_BASE
#define LPC_MCPWM_BASE
#define LPC_QEI_BASE
#define LPC_SC_BASE
#define LPC_EMAC_BASE
#define LPC_GPDMA_BASE
#define LPC_GPDMACH0_BASE
#define LPC_GPDMACH1_BASE
#define LPC_GPDMACH2_BASE
#define LPC_GPDMACH3_BASE
#define LPC_GPDMACH4_BASE
#define LPC_GPDMACH5_BASE
#define LPC_GPDMACH6_BASE
#define LPC_GPDMACH7_BASE
#define LPC_USB_BASE
#define LPC_GPIO0_BASE
#define LPC_GPIO1_BASE
#define LPC_GPIO2_BASE
#define LPC_GPIO3_BASE
#define LPC_GPIO4_BASE
#define WDT_ID 0
#define TIMER0_ID 1
#define TIMER1_ID 2
#define TC2_ID 3
#define TIMER3_ID 4
#define UART0_ID 5
#define UART1_ID 6
#define UART2_ID 7
#define UART3_ID 8
#define PWM1_ID 9
#define I2C0_ID 10
#define I2C1_ID 11
#define I2C2_ID 12
#define SPI_ID 13
#define SSP0_ID 14
#define SSP1_ID 15
#define PLL0_ID 16
#define RTC_ID 17
#define EINT0_ID 18
#define EINT1_ID 19
#define EINT2_ID 20
#define EINT3_ID 21
#define ADC_ID 22
#define BOD_ID 23
#define USB_ID 24
#define CAN_ID 25
#define DMA_ID 26
#define I2S_ID 27
#define ENET_ID 28
#define RIT_ID 29
#define MCPWM_ID 30
#define QEI_ID 31
#define PLL1_ID 32
#define USBACTIVITY_ID 33
#define CANACTIVITY_ID 34
#define PS7_P3_26_STCLK
#define PS3_P1_27_CLKOUT
#define PS4_P2_10_NMI
#define PS4_P2_10_EINT0
#define PS4_P2_11_EINT1
#define PS4_P2_12_EINT2
#define PS4_P2_13_EINT3
#define PS3_P1_26_CAP0_0
#define PS3_P1_27_CAP0_1
#define PS3_P1_28_MAT0_0
#define PS7_P3_25_MAT0_0
#define PS3_P1_29_MAT0_1
#define PS7_P3_26_MAT0_1
#define PS3_P1_18_CAP1_0
#define PS3_P1_19_CAP1_1
#define PS3_P1_22_MAT1_0
#define PS3_P1_25_MAT1_1
#define PS0_P0_4_CAP2_0
#define PS0_P0_5_CAP2_1
#define PS0_P0_6_MAT2_0
#define PS9_P4_28_MAT2_0
#define PS0_P0_7_MAT2_1
#define PS9_P4_29_MAT2_1
#define PS0_P0_8_MAT2_2
#define PS0_P0_9_MAT2_3
#define PS1_P0_23_CAP3_0
#define PS1_P0_24_CAP3_1
#define PS0_P0_10_MAT3_0
#define PS0_P0_11_MAT3_1
#define PS1_P0_23_AD0_0
#define PS1_P0_24_AD0_1
#define PS1_P0_25_AD0_2
#define PS1_P0_26_AD0_3
#define PS3_P1_30_AD0_4
#define PS3_P1_31_AD0_5
#define PS0_P0_2_AD0_7
#define PS0_P0_3_AD0_6
#define PS1_P0_26_AOUT
#define PS1_P0_17_MISO0
#define PS3_P1_23_MISO0
#define PS1_P0_18_MOSI0
#define PS3_P1_24_MOSI0
#define PS0_P0_15_SCK0
#define PS3_P1_20_SCK0
#define PS1_P0_16_SSEL0
#define PS3_P1_21_SSEL0
#define PS0_P0_8_MISO1
#define PS0_P0_9_MOSI1
#define PS0_P0_7_SCK1
#define PS3_P1_31_SCK1
#define PS0_P0_6_SSEL1
#define PS1_P0_17_MISO
#define PS1_P0_18_MOSI
#define PS0_P0_15_SCK
#define PS1_P0_16_SSEL
#define PS1_P0_27_SDA0
#define PS1_P0_28_SCL0
#define PS0_P0_0_SDA1
#define PS1_P0_19_SDA1
#define PS0_P0_1_SCL1
#define PS1_P0_20_SCL1
#define PS0_P0_10_SDA2
#define PS0_P0_11_SCL2
#define PS0_P0_6_I2SRX_SDA
#define PS1_P0_25_I2SRX_SDA
#define PS0_P0_5_I2SRX_WS
#define PS1_P0_24_I2SRX_WS
#define PS0_P0_4_I2SRX_CLK
#define PS1_P0_23_I2SRX_CLK
#define PS9_P4_28_RX_MCLK
#define PS0_P0_9_I2STX_SDA
#define PS4_P2_13_I2STX_SDA
#define PS0_P0_8_I2STX_WS
#define PS4_P2_12_I2STX_WS
#define PS0_P0_7_I2STX_CLK
#define PS4_P2_11_I2STX_CLK
#define PS9_P4_29_TX_MCLK
#define PS3_P1_18_PWM1_1
#define PS4_P2_0_PWM1_1
#define PS3_P1_20_PWM1_2
#define PS4_P2_1_PWM1_2
#define PS7_P3_25_PWM1_2
#define PS3_P1_21_PWM1_3
#define PS4_P2_2_PWM1_3
#define PS7_P3_26_PWM1_3
#define PS3_P1_23_PWM1_4
#define PS4_P2_3_PWM1_4
#define PS3_P1_24_PWM1_5
#define PS4_P2_4_PWM1_5
#define PS3_P1_26_PWM1_6
#define PS4_P2_5_PWM1_6
#define PS3_P1_28_PCAP1_0
#define PS4_P2_6_PCAP1_0
#define PS3_P1_29_PCAP1_1
#define PS3_P1_19_MCOA0
#define PS3_P1_22_MCOB0
#define PS3_P1_20_MCI0
#define PS3_P1_21_MCABORT
#define PS3_P1_25_MCOA1
#define PS3_P1_26_MCOB1
#define PS3_P1_23_MCI1
#define PS3_P1_28_MCOA2
#define PS3_P1_29_MCOB2
#define PS3_P1_24_MCI2
#define PS0_P0_2_TXD0
#define PS0_P0_3_RXD0
#define PS0_P0_15_TXD1
#define PS4_P2_0_TXD1
#define PS1_P0_16_RXD1
#define PS4_P2_1_RXD1
#define PS1_P0_17_CTS1
#define PS4_P2_2_CTS1
#define PS1_P0_22_RTS1
#define PS4_P2_7_RTS1
#define PS1_P0_19_DSR1
#define PS4_P2_4_DSR1
#define PS1_P0_20_DTR1
#define PS4_P2_5_DTR1
#define PS1_P0_18_DCD1
#define PS4_P2_3_DCD1
#define PS1_P0_21_RI1
#define PS4_P2_6_RI1
#define PS0_P0_10_TXD2
#define PS4_P2_8_TXD2
#define PS0_P0_11_RXD2
#define PS4_P2_9_RXD2
#define PS0_P0_0_TXD3
#define PS1_P0_25_TXD3
#define PS9_P4_28_TXD3
#define PS0_P0_1_RXD3
#define PS1_P0_26_RXD3
#define PS9_P4_29_RXD3
#define PS0_P0_1_TD1
#define PS1_P0_22_TD1
#define PS0_P0_0_RD1
#define PS1_P0_21_RD1
#define PS0_P0_5_TD2
#define PS4_P2_8_TD2
#define PS0_P0_4_RD2
#define PS4_P2_7_RD2
#define PS2_P1_0_ENET_TXD0
#define PS2_P1_1_ENET_TXD1
#define PS2_P1_9_ENET_RXD0
#define PS2_P1_10_ENET_RXD1
#define PS2_P1_4_ENET_TX_EN
#define PS2_P1_14_ENET_RX_ER
#define PS2_P1_8_ENET_CRS
#define PS2_P1_15_ENET_REF_CLK
#define PS3_P1_16_ENET_MDC
#define PS4_P2_8_ENET_MDC
#define PS3_P1_17_ENET_MDIO
#define PS4_P2_9_ENET_MDIO
#define PS1_P0_29_USB_DP
#define PS1_P0_30_USB_DM
#define PS1_P0_28_USB_SCL
#define PS1_P0_27_USB_SDA
#define PS3_P1_18_USB_UP_LED
#define PS3_P1_19_USB_PPWR
#define PS3_P1_22_USB_PWRD
#define PS4_P2_9_USB_CONNECT
#define PS3_P1_27_USB_OVRCR
#define PS3_P1_30_VBUS
#define P0_0_RD1_TXD3_SDA1 0
#define P0_1_TD1_RXD3_SCL1 1
#define P0_2_TXD0_AD0_7 2
#define P0_3_RXD0_AD0_6 3
#define P0_4_I2SRX_CLK_RD2_CAP2_0 4
#define P0_5_I2SRX_WS_TD2_CAP2_1 5
#define P0_6_I2SRX_SDA_SSEL1_MAT2_0 6
#define P0_7_I2STX_CLK_SCK1_MAT2_1 7
#define P0_8_I2STX_WS_MISO1_MAT2_2 8
#define P0_9_I2STX_SDA_MOSI1_MAT2_3 9
#define P0_10_TXD2_SDA2_MAT3_0 10
#define P0_11_RXD2_SCL2_MAT3_1 11
#define P0_15_TXD1_SCK0_SCK 15
#define P0_16_RXD1_SSEL0_SSEL 16
#define P0_17_CTS1_MISO0_MISO 17
#define P0_18_DCD1_MOSI0_MOSI 18
#define P0_19_DSR1_SDA1 19
#define P0_20_DTR1_SCL1 20
#define P0_21_RI1_RD1 21
#define P0_22_RTS1_TD1 22
#define P0_23_AD0_0_I2SRX_CLK_CAP3_0 23
#define P0_24_AD0_1_I2SRX_WS_CAP3_1 24
#define P0_25_AD0_2_I2SRX_SDA_TXD3 25
#define P0_26_AD0_3_AOUT_RXD3 26
#define P0_27_SDA0_USB_SDA 27
#define P0_28_SCL0_USB_SCL 28
#define P0_29_USB_DP 29
#define P0_30_USB_DM 30
#define P1_0_ENET_TXD0 0
#define P1_1_ENET_TXD1 1
#define P1_4_ENET_TX_EN 4
#define P1_8_ENET_CRS 8
#define P1_9_ENET_RXD0 9
#define P1_10_ENET_RXD1 10
#define P1_14_ENET_RX_ER 14
#define P1_15_ENET_REF_CLK 15
#define P1_16_ENET_MDC 16
#define P1_17_ENET_MDIO 17
#define P1_18_USB_UP_LED_PWM1_1_CAP1_0 18
#define P1_19_MCOA0_USB_PPWR_CAP1_1 19
#define P1_20_MCI0_PWM1_2_SCK0 20
#define P1_21_MCABORT_PWM1_3_SSEL0 21
#define P1_22_MCOB0_USB_PWRD_MAT1_0 22
#define P1_23_MCI1_PWM1_4_MISO0 23
#define P1_24_MCI2_PWM1_5_MOSI0 24
#define P1_25_MCOA1_MAT1_1 25
#define P1_26_MCOB1_PWM1_6_CAP0_0 26
#define P1_27_CLKOUT_USB_OVRCR_CAP0_1 27
#define P1_28_MCOA2_PCAP1_0_MAT0_0 28
#define P1_29_MCOB2_PCAP1_1_MAT0_1 29
#define P1_30_VBUS_AD0_4 30
#define P1_31_SCK1_AD0_5 31
#define P2_0_PWM1_1_TXD1 0
#define P2_1_PWM1_2_RXD1 1
#define P2_2_PWM1_3_CTS1_TRACEDATA3 2
#define P2_3_PWM1_4_DCD1_TRACEDATA2 3
#define P2_4_PWM1_5_DSR1_TRACEDATA1 4
#define P2_5_PWM1_6_DTR1_TRACEDATA0 5
#define P2_6_PCAP1_0_RI1_TRACECLK 6
#define P2_7_RD2_RTS1 7
#define P2_8_TD2_TXD2_ENET_MDC 8
#define P2_9_USB_CONNECT_RXD2_ENET_MDIO 9
#define P2_10_EINT0_NMI 10
#define P2_11_EINT1_I2STX_CLK 11
#define P2_12_EINT2_I2STX_WS 12
#define P2_13_EINT3_I2STX_SDA 13
#define P3_25_MAT0_0_PWM1_2 25
#define P3_26_STCLK_MAT0_1_PWM1_3 26
#define P4_28_RX_MCLK_MAT2_0_TXD3 28
#define P4_29_TX_MCLK_MAT2_1_RXD3 29