#define EMAC_MAC1_OFF 0x000
#define EMAC_MAC1
#define EMAC_MAC1_REC_EN_LSB 0
#define EMAC_MAC1_PASS_ALL_LSB 1
#define EMAC_MAC1_RX_FLOWC_LSB 2
#define EMAC_MAC1_TX_FLOWC_LSB 3
#define EMAC_MAC1_LOOPB_LSB 4
#define EMAC_MAC1_RES_TX_LSB 8
#define EMAC_MAC1_RES_MCS_TX_LSB 9
#define EMAC_MAC1_RES_RX_LSB 10
#define EMAC_MAC1_RES_MCS_RX_LSB 11
#define EMAC_MAC1_SIM_RES_LSB 14
#define EMAC_MAC1_SOFT_RES_LSB 15
#define EMAC_MAC1_REC_EN
#define EMAC_MAC1_PASS_ALL
#define EMAC_MAC1_RX_FLOWC
#define EMAC_MAC1_TX_FLOWC
#define EMAC_MAC1_LOOPB
#define EMAC_MAC1_RES_TX
#define EMAC_MAC1_RES_MCS_TX
#define EMAC_MAC1_RES_RX
#define EMAC_MAC1_RES_MCS_RX
#define EMAC_MAC1_SIM_RES
#define EMAC_MAC1_SOFT_RES
#define EMAC_MAC2_OFF 0x004
#define EMAC_MAC2
#define EMAC_MAC2_FULL_DUP_LSB 0
#define EMAC_MAC2_FRM_LEN_CHK_LSB 1
#define EMAC_MAC2_HUGE_FRM_EN_LSB 2
#define EMAC_MAC2_DLY_CRC_LSB 3
#define EMAC_MAC2_CRC_EN_LSB 4
#define EMAC_MAC2_PAD_EN_LSB 5
#define EMAC_MAC2_VLAN_PAD_EN_LSB 6
#define EMAC_MAC2_ADET_PAD_EN_LSB 7
#define EMAC_MAC2_PPREAM_ENF_LSB 8
#define EMAC_MAC2_LPREAM_ENF_LSB 9
#define EMAC_MAC2_NO_BACKOFF_LSB 12
#define EMAC_MAC2_BACK_PRESSURE_LSB 13
#define EMAC_MAC2_EXCESS_DEF_LSB 14
#define EMAC_MAC2_FULL_DUP
#define EMAC_MAC2_FRM_LEN_CHK
#define EMAC_MAC2_HUGE_FRM_EN
#define EMAC_MAC2_DLY_CRC
#define EMAC_MAC2_CRC_EN
#define EMAC_MAC2_PAD_EN
#define EMAC_MAC2_VLAN_PAD_EN
#define EMAC_MAC2_ADET_PAD_EN
#define EMAC_MAC2_PPREAM_ENF
#define EMAC_MAC2_LPREAM_ENF
#define EMAC_MAC2_NO_BACKOFF
#define EMAC_MAC2_BACK_PRESSURE
#define EMAC_MAC2_EXCESS_DEF
#define EMAC_IPGT_OFF 0x008
#define EMAC_IPGT
#define EMAC_IPGT_BB_LSB 0
#define EMAC_IPGT_BB_MSB 6
#define EMAC_IPGR_OFF 0x00C
#define EMAC_IPGR
#define EMAC_IPGR_NBB2_LSB 0
#define EMAC_IPGR_NBB2_MSB 6
#define EMAC_IPGR_NBB1_LSB 8
#define EMAC_IPGR_NBB1_MSB 14
#define EMAC_CLRT_OFF 0x010
#define EMAC_CLRT
#define EMAC_CLRT_RMAX_LSB 0
#define EMAC_CLRT_RMAX_MSB 3
#define EMAC_CLRT_COLLWIN_LSB 8
#define EMAC_CLRT_COLLWIN_MSB 13
#define EMAC_MAXF_OFF 0x014
#define EMAC_MAXF
#define EMAC_SUPP_OFF 0x018
#define EMAC_SUPP
#define EMAC_SUPP_SPEED_LSB 8
#define EMAC_SUPP_RES_RMII_LSB 11
#define EMAC_SUPP_SPEED
#define EMAC_SUPP_RES_RMII
#define EMAC_TEST_OFF 0x01C
#define EMAC_TEST
#define EMAC_TEST_SHCUT_PQUANTA_LSB 0
#define EMAC_TEST_TST_PAUSE_LSB 1
#define EMAC_TEST_TST_BACKP_LSB 2
#define EMAC_TEST_SHCUT_PQUANTA
#define EMAC_TEST_TST_PAUSE
#define EMAC_TEST_TST_BACKP
#define EMAC_MCFG_OFF 0x020
#define EMAC_MCFG
#define EMAC_MCFG_SCAN_INC_LSB 0
#define EMAC_MCFG_SUPP_PREAM_LSB 1
#define EMAC_MCFG_CLK_SEL_LSB 2
#define EMAC_MCFG_CLK_SEL_MSB 5
#define EMAC_MCFG_RES_MII_LSB 15
#define EMAC_MCFG_SCAN_INC
#define EMAC_MCFG_SUPP_PREAM
#define EMAC_MCFG_RES_MII
#define EMAC_MCMD_OFF 0x024
#define EMAC_MCMD
#define EMAC_MCMD_READ_LSB 0
#define EMAC_MCMD_SCAN_LSB 1
#define EMAC_MCMD_READ
#define EMAC_MCMD_SCAN
#define EMAC_MADR_OFF 0x028
#define EMAC_MADR
#define EMAC_MADR_REG_ADR_LSB 0
#define EMAC_MADR_REG_ADR_MSB 4
#define EMAC_MADR_PHY_ADR_LSB 8
#define EMAC_MADR_PHY_ADR_MSB 12
#define EMAC_MWTD_OFF 0x02C
#define EMAC_MWTD
#define EMAC_MRDD_OFF 0x030
#define EMAC_MRDD
#define EMAC_MIND_OFF 0x034
#define EMAC_MIND
#define EMAC_MIND_BUSY_LSB 0
#define EMAC_MIND_SCAN_LSB 1
#define EMAC_MIND_NOT_VAL_LSB 2
#define EMAC_MIND_MII_LINK_FAIL_LSB 3
#define EMAC_MIND_BUSY
#define EMAC_MIND_SCAN
#define EMAC_MIND_NOT_VAL
#define EMAC_MIND_MII_LINK_FAIL
#define EMAC_SA0_OFF 0x040
#define EMAC_SA0
#define EMAC_SA1_OFF 0x044
#define EMAC_SA1
#define EMAC_SA2_OFF 0x048
#define EMAC_SA2
#define EMAC_SA_HI_LSB 0
#define EMAC_SA_HI_MSB 7
#define EMAC_SA_LO_LSB 8
#define EMAC_SA_LO_MSB 15
#define EMAC_CR_OFF 0x100
#define EMAC_CR
#define EMAC_CR_RX_EN_LSB 0
#define EMAC_CR_TX_EN_LSB 1
#define EMAC_CR_REG_RES_LSB 3
#define EMAC_CR_TX_RES_LSB 4
#define EMAC_CR_RX_RES_LSB 5
#define EMAC_CR_PASS_RUNT_FRM_LSB 6
#define EMAC_CR_PASS_RX_FILT_LSB 7
#define EMAC_CR_TX_FLOW_CTRL_LSB 8
#define EMAC_CR_RMII_LSB 9
#define EMAC_CR_FULL_DUP_LSB 10
#define EMAC_CR_RX_EN
#define EMAC_CR_TX_EN
#define EMAC_CR_REG_RES
#define EMAC_CR_TX_RES
#define EMAC_CR_RX_RES
#define EMAC_CR_PASS_RUNT_FRM
#define EMAC_CR_PASS_RX_FILT
#define EMAC_CR_TX_FLOW_CTRL
#define EMAC_CR_RMII
#define EMAC_CR_FULL_DUP
#define EMAC_SR_OFF 0x104
#define EMAC_SR
#define EMAC_SR_RX_EN_LSB 0
#define EMAC_SR_TX_EN_LSB 1
#define EMAC_SR_RX_EN
#define EMAC_SR_TX_EN
#define EMAC_RXDESCR_OFF 0x108
#define EMAC_RXDESCR
#define EMAC_RXSTAT_OFF 0x10C
#define EMAC_RXSTAT
#define EMAC_RXDESCR_NUM_OFF 0x110
#define EMAC_RXDESCR_NUM
#define EMAC_RXPROD_IDX_OFF 0x114
#define EMAC_RXPROD_IDX
#define EMAC_RXCONS_IDX_OFF 0x118
#define EMAC_RXCONS_IDX
#define EMAC_TXDESCR_OFF 0x11C
#define EMAC_TXDESCR
#define EMAC_TXSTAT_OFF 0x120
#define EMAC_TXSTAT
#define EMAC_TXDESCR_NUM_OFF 0x124
#define EMAC_TXDESCR_NUM
#define EMAC_TXPROD_IDX_OFF 0x128
#define EMAC_TXPROD_IDX
#define EMAC_TXCONS_IDX_OFF 0x12C
#define EMAC_TXCONS_IDX
#define EMAC_TSV0_OFF 0x158
#define EMAC_TSV0
#define EMAC_TSV0_CRC_ERR_LSB 0
#define EMAC_TSV0_LEN_CHKERR_LSB 1
#define EMAC_TSV0_LEN_OUTRNG_LSB 2
#define EMAC_TSV0_DONE_LSB 3
#define EMAC_TSV0_MCAST_LSB 4
#define EMAC_TSV0_BCAST_LSB 5
#define EMAC_TSV0_PKT_DEFER_LSB 6
#define EMAC_TSV0_EXC_DEFER_LSB 7
#define EMAC_TSV0_EXC_COLL_LSB 8
#define EMAC_TSV0_LATE_COLL_LSB 9
#define EMAC_TSV0_GIANT_LSB 10
#define EMAC_TSV0_UNDERRUN_LSB 11
#define EMAC_TSV0_BYTES_LSB 12
#define EMAC_TSV0_BYTES_MSB 27
#define EMAC_TSV0_CTRL_FRAME_LSB 28
#define EMAC_TSV0_PAUSE_LSB 29
#define EMAC_TSV0_BACK_PRESS_LSB 30
#define EMAC_TSV0_VLAN_LSB 31
#define EMAC_TSV0_CRC_ERR
#define EMAC_TSV0_LEN_CHKERR
#define EMAC_TSV0_LEN_OUTRNG
#define EMAC_TSV0_DONE
#define EMAC_TSV0_MCAST
#define EMAC_TSV0_BCAST
#define EMAC_TSV0_PKT_DEFER
#define EMAC_TSV0_EXC_DEFER
#define EMAC_TSV0_EXC_COLL
#define EMAC_TSV0_LATE_COLL
#define EMAC_TSV0_GIANT
#define EMAC_TSV0_UNDERRUN
#define EMAC_TSV0_CTRL_FRAME
#define EMAC_TSV0_PAUSE
#define EMAC_TSV0_BACK_PRESS
#define EMAC_TSV0_VLAN
#define EMAC_TSV1_OFF 0x15C
#define EMAC_TSV1
#define EMAC_TSV1_BYTE_CNT_LSB 0
#define EMAC_TSV1_BYTE_CNT_MSB 15
#define EMAC_TSV1_COLL_CNT_LSB 16
#define EMAC_TSV1_COLL_CNT_MSB 19
#define EMAC_RSV_OFF 0x160
#define EMAC_RSV
#define EMAC_RSV_BYTE_CNT_LSB 0
#define EMAC_RSV_BYTE_CNT_MSB 15
#define EMAC_RSV_PKT_IGNORED_LSB 16
#define EMAC_RSV_RXDV_SEEN_LSB 17
#define EMAC_RSV_CARR_SEEN_LSB 18
#define EMAC_RSV_REC_CODEV_LSB 19
#define EMAC_RSV_CRC_ERR_LSB 20
#define EMAC_RSV_LEN_CHKERR_LSB 21
#define EMAC_RSV_LEN_OUTRNG_LSB 22
#define EMAC_RSV_REC_OK_LSB 23
#define EMAC_RSV_MCAST_LSB 24
#define EMAC_RSV_BCAST_LSB 25
#define EMAC_RSV_DRIB_NIBB_LSB 26
#define EMAC_RSV_CTRL_FRAME_LSB 27
#define EMAC_RSV_PAUSE_LSB 28
#define EMAC_RSV_UNSUPP_OPC_LSB 29
#define EMAC_RSV_VLAN_LSB 30
#define EMAC_RSV_PKT_IGNORED
#define EMAC_RSV_RXDV_SEEN
#define EMAC_RSV_CARR_SEEN
#define EMAC_RSV_REC_CODEV
#define EMAC_RSV_CRC_ERR
#define EMAC_RSV_LEN_CHKERR
#define EMAC_RSV_LEN_OUTRNG
#define EMAC_RSV_REC_OK
#define EMAC_RSV_MCAST
#define EMAC_RSV_BCAST
#define EMAC_RSV_DRIB_NIBB
#define EMAC_RSV_CTRL_FRAME
#define EMAC_RSV_PAUSE
#define EMAC_RSV_UNSUPP_OPC
#define EMAC_RSV_VLAN
#define EMAC_FCC_OFF 0x170
#define EMAC_FCC
#define EMAC_FCC_MIRR_CNT_LSB 0
#define EMAC_FCC_MIRR_CNT_MSB 15
#define EMAC_FCC_PAUSE_TIM_LSB 16
#define EMAC_FCC_PAUSE_TIM_MSB 31
#define EMAC_FCS_OFF 0x174
#define EMAC_FCS
#define EMAC_FCS_MIRR_CNT_LSB 0
#define EMAC_FCS_MIRR_CNT_MSB 15
#define EMAC_RFC_OFF 0x200
#define EMAC_RFC
#define EMAC_RFC_UCAST_EN_LSB 0
#define EMAC_RFC_BCAST_EN_LSB 1
#define EMAC_RFC_MCAST_EN_LSB 2
#define EMAC_RFC_UCAST_HASH_EN_LSB 3
#define EMAC_RFC_MCAST_HASH_EN_LSB 4
#define EMAC_RFC_PERFECT_EN_LSB 5
#define EMAC_RFC_MAGP_WOL_EN_LSB 12
#define EMAC_RFC_PFILT_WOL_EN_LSB 13
#define EMAC_RFC_UCAST_EN
#define EMAC_RFC_BCAST_EN
#define EMAC_RFC_MCAST_EN
#define EMAC_RFC_UCAST_HASH_EN
#define EMAC_RFC_MCAST_HASH_EN
#define EMAC_RFC_PERFECT_EN
#define EMAC_RFC_MAGP_WOL_EN
#define EMAC_RFC_PFILT_WOL_EN
#define EMAC_WOLSR_OFF 0x204
#define EMAC_WOLSR
#define EMAC_WOLCR_OFF 0x208
#define EMAC_WOLCR
#define EMAC_WOL_UCAST_LSB 0
#define EMAC_WOL_BCAST_LSB 1
#define EMAC_WOL_MCAST_LSB 2
#define EMAC_WOL_UCAST_HASH_LSB 3
#define EMAC_WOL_MCAST_HASH_LSB 4
#define EMAC_WOL_PERFECT_LSB 5
#define EMAC_WOL_RX_FILTER_LSB 7
#define EMAC_WOL_MAG_PACKET_LSB 8
#define EMAC_WOL_UCAST
#define EMAC_WOL_BCAST
#define EMAC_WOL_MCAST
#define EMAC_WOL_UCAST_HASH
#define EMAC_WOL_MCAST_HASH
#define EMAC_WOL_PERFECT
#define EMAC_WOL_RX_FILTER
#define EMAC_WOL_MAG_PACKET
#define EMAC_HASHFILTERL_OFF 0x210
#define EMAC_HASHFILTERL
#define EMAC_HASHFILTERH_OFF 0x214
#define EMAC_HASHFILTERH
#define EMAC_INT_STAT_OFF 0xFE0
#define EMAC_INT_STAT
#define EMAC_INT_ENA_OFF 0xFE4
#define EMAC_INT_ENA
#define EMAC_INT_CLR_OFF 0xFE8
#define EMAC_INT_CLR
#define EMAC_INT_SET_OFF 0xFEC
#define EMAC_INT_SET
#define EMAC_INT_RX_OVERRUN_LSB 0
#define EMAC_INT_RX_ERR_LSB 1
#define EMAC_INT_RX_FIN_LSB 2
#define EMAC_INT_RX_DONE_LSB 3
#define EMAC_INT_TX_UNDERRUN_LSB 4
#define EMAC_INT_TX_ERR_LSB 5
#define EMAC_INT_TX_FIN_LSB 6
#define EMAC_INT_TX_DONE_LSB 7
#define EMAC_INT_SOFT_INT_LSB 12
#define EMAC_INT_WAKEUP_LSB 13
#define EMAC_INT_RX_OVERRUN
#define EMAC_INT_RX_ERR
#define EMAC_INT_RX_FIN
#define EMAC_INT_RX_DONE
#define EMAC_INT_TX_UNDERRUN
#define EMAC_INT_TX_ERR
#define EMAC_INT_TX_FIN
#define EMAC_INT_TX_DONE
#define EMAC_INT_SOFT_INT
#define EMAC_INT_WAKEUP
#define EMAC_PD_OFF 0xFF4
#define EMAC_PD
#define EMAC_PD_POWER_DOWN_LSB 31
#define EMAC_PD_POWER_DOWN
#define EMAC_MODULE_ID_OFF 0xFFC
#define EMAC_MODULE_ID
#define EMAC_RCTRL_SIZE( n )
#define EMAC_RCTRL_INT 0x80000000
#define EMAC_RINFO_SIZE 0x000007FF
#define EMAC_RINFO_CTRL_FRAME 0x00040000
#define EMAC_RINFO_VLAN 0x00080000
#define EMAC_RINFO_FAIL_FILT 0x00100000
#define EMAC_RINFO_MCAST 0x00200000
#define EMAC_RINFO_BCAST 0x00400000
#define EMAC_RINFO_CRC_ERR 0x00800000
#define EMAC_RINFO_SYM_ERR 0x01000000
#define EMAC_RINFO_LEN_ERR 0x02000000
#define EMAC_RINFO_RANGE_ERR 0x04000000
#define EMAC_RINFO_ALIGN_ERR 0x08000000
#define EMAC_RINFO_OVERRUN 0x10000000
#define EMAC_RINFO_NO_DESCR 0x20000000
#define EMAC_RINFO_LAST_FLAG 0x40000000
#define EMAC_RINFO_ERR 0x80000000
#define EMAC_RINFO_ERR_MASK
#define EMAC_TCTRL_SIZE 0x000007FF
#define EMAC_TCTRL_OVERRIDE 0x04000000
#define EMAC_TCTRL_HUGE 0x08000000
#define EMAC_TCTRL_PAD 0x10000000
#define EMAC_TCTRL_CRC 0x20000000
#define EMAC_TCTRL_LAST 0x40000000
#define EMAC_TCTRL_INT 0x80000000
#define EMAC_TINFO_COL_CNT 0x01E00000
#define EMAC_TINFO_DEFER 0x02000000
#define EMAC_TINFO_EXCESS_DEF 0x04000000
#define EMAC_TINFO_EXCESS_COL 0x08000000
#define EMAC_TINFO_LATE_COL 0x10000000
#define EMAC_TINFO_UNDERRUN 0x20000000
#define EMAC_TINFO_NO_DESCR 0x40000000
#define EMAC_TINFO_ERR 0x80000000
| struct _EMAC_DESCRIPTOR | |
| { | |
| uint8_t* desc_packet; | |
| uint32_t desc_control; | |
| } |
| struct EMAC_RXSTATUS | |
| { | |
| uint32_t rxs_info; | |
| uint32_t rxs_hashcrc; | |
| } |