#define SSP_CR0_OFF 0x00000000
#define SSP_CR0_DSS_MSK 0x0000000F
#define SSP_CR0_DSS_LSB 0
#define SSP_CR0_DSS( n )
#define SSP_CR0_FRF_MSK 0x00000030
#define SSP_CR0_FRF_SPI 0x00000000
#define SSP_CR0_FRF_TI 0x00000010
#define SSP_CR0_FRF_MW 0x00000020
#define SSP_CR0_CPOL 0x00000040
#define SSP_CR0_CPHA 0x00000080
#define SSP_CR0_SPI_MODE0 0
#define SSP_CR0_SPI_MODE1 SSP_CR0_CPHA
#define SSP_CR0_SPI_MODE2 SSP_CR0_CPOL
#define SSP_CR0_SPI_MODE3
#define SSP_CR0_SCR_MSK 0x0000FF00
#define SSP_CR0_SCR_LSB 8
#define SSP_CR1_OFF 0x00000004
#define SSP_CR1_LBM 0x00000001
#define SSP_CR1_SSE 0x00000002
#define SSP_CR1_MS 0x00000004
#define SSP_CR1_SOD 0x00000008
#define SSP_DR_OFF 0x00000008
#define SSP_SR_OFF 0x0000000C
#define SSP_SR_TFE 0x00000001
#define SSP_SR_TNF 0x00000002
#define SSP_SR_RNE 0x00000004
#define SSP_SR_RFF 0x00000008
#define SSP_SR_BSY 0x00000010
#define SSP_CPSR_OFF 0x00000010
#define SSP_IMSC_OFF 0x00000014
#define SSP_RIS_OFF 0x00000018
#define SSP_MIS_OFF 0x0000001C
#define SSP_ICR_OFF 0x00000020
#define SSP_RORI 0x00000001
#define SSP_RTI 0x00000002
#define SSP_RXI 0x00000004
#define SSP_TXI 0x00000008
#define SSP_DMACR_OFF 0x00000024
#define SSP_RXDMAE 0x00000001
#define SSP_TXDMAE 0x00000002