#define OWI_READ_ROM 0x33
#define OWI_OVERDRIVE_SKIP_ROM 0x3c
#define OWI_CONVERT_T 0x44
#define OWI_MATCH_ROM 0x55
#define OWI_OVERDRIVE_MATCH_ROM 0x69
#define OWI_SKIP_ROM 0xCC
#define OWI_READ 0xBE
#define OWI_SEARCH_ROM 0xF0
#define OWI_LAST_DEVICE 0x00
#define OWI_SEARCH_FIRST 0xFF
#define W1_FAMILY_DEFAULT 0
#define W1_FAMILY_SMEM_01 0x01
#define W1_FAMILY_SMEM_81 0x81
#define W1_THERM_DS18S20 0x10
#define W1_FAMILY_DS28E04 0x1C
#define W1_COUNTER_DS2423 0x1D
#define W1_THERM_DS1822 0x22
#define W1_EEPROM_DS2433 0x23
#define W1_THERM_DS18B20 0x28
#define W1_FAMILY_DS2408 0x29
#define W1_EEPROM_DS2431 0x2D
#define W1_FAMILY_DS2760 0x30
#define W1_FAMILY_DS2780 0x32
#define W1_THERM_DS1825 0x3B
#define W1_FAMILY_DS2781 0x3D
#define W1_THERM_DS28EA00 0x42
#define OWI_OVERDRIVE 0x1
#define OWI_PULLUP 0x2
enum OWI_ERRORS | |
{ | |
OWI_SUCCESS; | |
OWI_PRESENCE_ERR; | |
OWI_INVALID_HW; | |
OWI_OUT_OF_MEM; | |
OWI_HW_ERROR; | |
OWI_DATA_ERROR; | |
OWI_NOT_IMPLEMENTED; | |
} |
enum OWIBUS_MODE | |
{ | |
OWI_MODE_NORMAL; | |
OWI_MODE_OVERDRIVE; | |
OWI_MODE_NONE; | |
} |
enum STM32_OWITIMER_COMMANDS | |
{ | |
OWI_CMD_RESET; | |
OWI_CMD_RWBIT; | |
OWI_CMD_NONE; | |
} |
enum STM32_OWITIMER_PHASES | |
{ | |
OWI_PHASE_SETUP; | |
OWI_PHASE_SYNC_PULSE; | |
OWI_PHASE_SYNC_PULSE_LOW; | |
OWI_PHASE_RW; | |
OWI_PHASE_RELEASE; | |
OWI_PHASE_NONE; | |
} |
See: | Type struct _NUTOWIBUS |
struct _NUTOWIBUS | |
{ | |
uintptr_t owibus_info; | |
uint32_t mode; | |
int (*OwiSetup)(NUTOWIBUS*); | |
int (*OwiTouchReset)(NUTOWIBUS*); | |
int (*OwiReadBlock)(NUTOWIBUS* bus,uint8_t* data,uint_fast8_t); | |
int (*OwiWriteBlock)(NUTOWIBUS* bus,uint8_t* data,uint_fast8_t); | |
} |
Defined in: | nut/dev/owibus0uart.c |
owiBus0Gpio
extern NUTOWIBUS owiBus0Gpio
Defined in: | nut/dev/owibus0gpio.c |